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    Overload protection and high sensitivity design of mobile TV front end

     

    The mobile TV receiving front end must have the sensitivity required to work far away from the transmitter and tolerate overload when there is a strong signal. It can be integrated into in-vehicle entertainment (ICE) systems, as well as mobile TV receiving capabilities in a variety of portable electronic devices such as mobile phones, portable digital assistants (PDAs), and notebook computers, even if the distance between the user's receiver and transmitter varies It should also perform well under the conditions of changing schedule (different from traditional broadcast and television). Combining a high-gain low-noise amplifier (LNA) with a PIN diode bypass switch can achieve a low-cost solution for a mobile TV receiver front end with overload protection and high sensitivity.

    The most practical way to realize a mobile TV receiver is to reduce the gain of the receiver under strong signal conditions. The variable RF signal gain simplifies the linearity requirements of the mixer stage, allowing the use of low-cost RF ICs to build receiver modules. In a cascade analysis with a switchable/adjustable gain receiver front end, the improvement of the input third-order intermodulation intercept point (IIP3) will be a function of the gain change. Compared with fixed gain receivers, adjustable gain receivers can better handle strong signals.

    The automatic gain control (AGC) circuit can also be used to change the LNA gain, and because the AGC is usually implemented before the channel filter, it can respond to the overload from the adjacent channel transmission.

       One way to reduce the RF gain is to shunt part of the RF signal to ground before the LNA. This method uses the least number of RF switching elements, but when the switch is turned off, the impedance will not match, which may affect other parts of the system. A workaround is to connect the damping element to the high impedance or "hot" end of the LNA parallel resonant network, although from the perspective of a larger gain control range, this approach sacrifices RF selectivity before the LNA.

       When the received signal overloads the stages behind the LNA (such as a mixer or an intermediate frequency (IF) amplifier), a pair of RF switches can also be used to bypass the LNA stage. In the bypass state, the input signal is directly transmitted to the down converter IC. As long as the components in the bypass signal loop match the characteristic impedance (mobile TV is 75Ω), the chance of mismatch will be minimized. Of course, the added switch makes the circuit more complicated.

    Another way is to reduce the RF gain by reducing the quiescent current supplied to the active device of the LNA. Amplifiers and devices using this technology, such as dual-gate MOSFETs, use additional device terminals to control the bias current. Because no switching element is used, this gain control method is the simplest in the circuit, but because the collector/drain current is lower than the DC operating point of the rated device, its linearity is sacrificed.

    In order to meet customer requirements for LNA in dual-mode (analog/digital) mobile TV receivers operating in the 47~870MHz spectrum, several MMIC options were considered, but their linearity was not good enough, so they were not adopted. Here adopts a broadband high linearity MMIC LNA (MGA-68563 type) and an external PIN diode switch to design a scheme.

    This single-stage GaAs PHEMT LNA device has a gate width of 800 microns (Figure 3). The gate of the device is connected to an internal current mirror to supplement the effects of process changes and minimize the effects of threshold voltage variations. The LNA uses lossy negative feedback to achieve stability and stabilize the amplitude response within a 3dB window (±1.5dB) in the 100MHz~1GHz spectrum.

     Because of its internal feedback and output return loss lower than 10dB, this MMIC does not require output impedance matching. However, matching the input in such a wide frequency range (47~870MHz) proved to be difficult and requires an unconventional method. In order to optimize the input return loss index, the drain current (Ids) of the FET must be high The nominal value is 10mA. The 20mA Ids can meet the input return loss performance requirements, but the Ids was selected as 30mA to make it wide enough to compensate for any impact caused by the added PIN diode switching circuit. Pin 4 of the MMIC LNA controls the current flowing through the internal bias current generator through an external resistor R1. Changing the size of R1 will change Ids, but the power supply voltage Vd will remain at 3V. Three times the nominal Ids can provide higher linearity.

     When designing the LNA/switch circuit, 4 PIN diodes were used in the bypass switch at the beginning. This is a common configuration for double pole double throw (DPDT) switches. The working principle of this circuit is to make the pair of PIN diodes on the upper part conduct, and make the pair on the lower part zero bias, and vice versa. In normal operation, only the low pair of PIN diodes conduct, and the LNA amplifies the RF signal. When the RF gain must be reduced, the upper pair of PIN diodes are turned on, and the RF signal is routed around the LNA in a bypass mode. These resistors are used to adjust the forward current of the PIN diode and isolate the RF signal from the logic control ports VSW1 and VSW2. The first design used a lot of components, so a simpler solution was needed.

     Through communicating with customers, we have developed a simpler double-pole single-throw (DPST) switch, which only needs to connect or disconnect the bypass path to the input and output ports. Since switching control of the LNA path is no longer performed, in order to utilize the inherent isolation characteristics of the unbiased FET, the LNA power supply (Vdd) must be turned off in the bypass mode. This approach reduces the return loss performance of the bypass path because this path has finite gate and drain impedance in parallel with unbiased FETs.

    During normal operation, the PIN diode power supply is off (VSW=0V), while the LNA power supply is still restored to 3V. However, these zero-bias PIN diodes are affected by parasitic capacitance, so the gain and return loss performance of the LNA is impaired due to the incomplete isolation of the bypass path from the input and output ports.

     

     

     

     

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