When designing with an analog-to-digital converter (ADC), it is easy to mistakenly believe that reducing the input signal to meet the full-scale range of the ADC will cause a significant decrease in the signal-to-noise ratio (SNR).
System designers who need to deal with wide voltage swings are particularly concerned about this. In addition, compared with ADCs powered by higher voltages, ADCs powered by low voltages (5V or lower) are more diverse.
Higher voltage supply usually leads to greater power consumption and more complicated circuit board layout (for example, more decoupling capacitors are required).
Many signals generated by sensors or systems are bipolar high voltage signals (such as the widely used ±10V signal). However, there are many simple ways to pass this signal through the ADC; various integrated high-voltage ADC solutions can also be used: it can handle this large full-scale input signal without sacrificing SNR. These solutions require a very high supply voltage to meet the input range requirements, and their power consumption is also quite large (Figure 1). These high-voltage ADCs also narrow the selection of signal conditioning (op amp) solutions. If the signal needs to be multiplexed with a combination of high-voltage and low-voltage inputs, the system cost will increase significantly (Figure 2).
You can also use the input amplifier to scale the signal to match the full-scale input range of the low-voltage ADC. This signal conditioning circuit can be connected to a multiplexed input so that all signals can be in line with the ADC range (Figure 3).
When using an amplifier for signal voltage scaling, the noise is referenced to the amplifier input. At this time, there are two main noise sources: the input reference noise of the amplifier itself, and the reduced input reference noise of the ADC. These two noise sources are combined in a quadratic term. In addition, the noise of the amplifier is also filtered by the input bandwidth of the ADC and the anti-aliasing filter between the amplifier and the ADC input, see Figure 4.
Figure 4: The zoom amplifier introduces noise, but the noise is filtered by the RC circuit and the input network of the ADC.
The calculation formula of system SNR (amplifier input terminal) is:
Where: VnADC is the input RMS noise of the ADC; VnOPA is the input reference noise of the amplifier (X times the input reference) = single-pole -3dB frequency.
Given the full-scale range of the ADC, ADC input reference noise, and amplifier scale factor, there are two variables that will affect the goal of SNR loss reduction: the cutoff frequency of the filter and the input reference noise of the amplifier.
If the signal source has low frequency components, a filter can be designed so that the amplifier can tolerate larger input noise (higher input noise is usually related to lower power consumption and cost). If the ADC limits the bandwidth of the system, the amplifier needs to have low enough input reference noise to control the SNR loss within an acceptable range.
For example, given a ±10V input signal and a 5VP-P full-scale range ADC with an SNR of 92dB, the scale factor (the ratio of the input to the full-scale range) is 4. The ADC input reference noise in the data sheet is 44.4 nV RMS. Assuming that the cutoff frequency of the filter is 10kHz and the input reference noise of the amplifier is 10nV/ (Hz) 1/2, the SNR loss is: SNR(loss)=0.035dB.
If there is no filter and the ADC bandwidth is assumed to be 10MHz, in order to achieve the same SNR loss, the required input reference noise becomes 0.3nV/(Hz) 1/2. This requirement is very strict.
For an ADC with the same bandwidth of 10MHz, if SNR(loss)=0.5dB is allowed, the noise requirement of the amplifier is 4nV/(Hz) 1/2, which is relatively easy to implement.
Therefore, if the system bandwidth and allowable SNR loss are given, adding a proportional amplifier to convert the high-voltage signal to a low-voltage ADC in the full-scale range will be a completely feasible solution. When feeding multiple signals with different swing amplitudes to a multiplexed low-voltage ADC, this solution can achieve a cost-effective system.
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