With artificial intelligence, deep learning is more popular in the market, in addition to GPU, many unicorn AI special chips, FPGA is also one of the popular platforms of deep learning. This article will introduce you to 5 powerful to incredible The FPGA development board, of course, the price is also a high rather, and it will be high-end "toys" for most engineers.
RTG4 development kit
RTG4-DEV-KIT is MicroSemi's products, of course, is currently acquired by Microchip, which is a set of high-end customers, mainly for data transmission, serial connection, bus interface, etc. High density high. Application of high speed design of performance FPGA.
The development board uses RT4G150 devices that use ceramic packages to provide 150,000 logical components, with 1,657 pins, the following figure is an external interface function diagram of the RTG4-DEV-KIT development board.
The hardware function of the RTG4 development kit is as follows:
Two 1GB DDR3 Synchronous Dynamic Random Access Memory (SDRAM)
2GB SPI Flash
PCI Express Gen1 interface 1
PCIe X4 interface
A pair of SMA connector for testing the full duplex Serdes channel
Two FMC connectors with HPC / LPC pins for expansion
RJ45 interface for 10/100/1000 Ethernet
USB Micro-AB Connector
SPI, GPIO interface
FTDI programmer interface for programming external SPI Flash
JTAG programming interface
RVI interface for application programming and debugging
FlashPro programming interface
Embedded tracking macro (ETM) unit interface for debugging
Double-column insert package (DIP) switch for user application
Press button switch and LED
Current measuring test point
The following is the hardware block diagram of the RTG4-DEV-KIT development board
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From the hardware block diagram, you can also see the RTG4-DEV-KIT complex power management system, 12V DC DC power supply, allocated to the power supply of each functional part via DCDC / and LDO.
Intel Stratix 10 Development Kit
The Intel Stratix 10 development kit is a full design environment that contains all kinds of hardware and hardware for evaluating the functionality of Stratix 10 FPGA. This kit can be used to develop and test PCI Express 3.0 design by conforming to the PCI-SIG development board. Use these development boards to develop and test memory subsystems consisting of DDR4, DDR3, QDR IV, and RLDRAM III memories. The modular and scalable design can also be developed by using the FPGA clamp card (FMC) connector to connect to the FMC interlayer. The kit supports JESD204B, Serial Rapidio, 10Gbps Ethernet (10GBE), SONET, Universal Public Radio Interface (CPRI), OBSAI, and many other protocols.
Intel Stratix 10 Development Kit Hardware Box Chart
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The main FPGA on the development board is Intel's Stratix 10 series of products, providing 2X performance and ultra-low power consumption compared to the previous generation of products, with several pioneering innovations such as new HyperflexTM and architectures, can meet the growing growth Bandwidth and processing performance to meet the power budget. Embedding hardware system based on quad-core 64-bit ARM Cortex-A53, using Intel 14-NM TRI-GATE (FINFET) Technology and Hybrid 3D System (SIP) technology, single-chip core up to 5.5 million and logic units, up to 96 A full-duplex transceiver with a data rate of up to 28.3Gbps, which is mainly used in computing and storage, network devices, optical transmission networks, broadcast, military radar, medical equipment, testing and measurement, and 5G wireless devices, ASIC prototypes.
Intel's new series Stratix 10 products can be said to have a very across time, and this series of product products is also very rich, and it is convenient for companies choice for various needs.
ADS8-V1 evaluation board
Specifically, the ADS8-V1 evaluation board is not a plate that is specifically evaluated for FPGA, but to support ADI high-speed data conversion, when connected to the specified Adi High Speed ADC evaluation board, ADS8-V1 can be used as data acquisition plate. The FPGA on ADS8-V1 is designed to support the highest speed JESD204B analog-to-digital converter, which can act as a data receiver while the ADC is a data transmitter.
The outer exit of the ADS8-V1EBZ interface is as follows:
Xilinx Kintex UltraScale Xcku040-3ffva1156e FPGA
One (1) FMC + connector
One (1) FMC + connector supports twenty (20) 16Gbps transceiver
DDR4 SDRAM
Simple USB 3.0 port interface
ADI powerful data acquisition evaluation board can be applied to aerospace and defense, electronic monitoring and confrontation, instrumentation and measurement, communication test equipment, signal generator (via RF transmission audio), 5G field.
Reflex CES XPRESSVUP-LP9P
Reflex CES XPRESSVUP-LP9P is based on the low configuration of the Virtex UltraScale + Vu9P FPGA, which is designed for network applications such as HPC. This plate provides 2 sets of DDR4, 2 groups QDR2 + memory and 2 QSFP28 cages for multiple 10GBE / 40GBE / 100GBE network solutions. Its main features include: PCIe Gen3 X16, Xilinx Virtex UltraScale + Vu9p FPGA, onboard two DDR4 and two QDR2 + independent groups, two QSFP28 fiber cages for multi-network solutions, with 16 channels, 8 GB / S link rate PCIe interface (Gen3), etc.
XPRESSVUP-LP9P Technical Specifications
FPGA and configuration module
XILINX Virtex UltraScale + 16NM FPGA: XCVU9P-L2FLGB2104E (Production)
XCVU9P-L2FLGB2104E (production)
2,6 M system logic unit
270 MB Ultram (UltraScale + provides high density, dual port, synchronous memory module)
JTAG connector for external Xilinx USB cable
Double four spi (x8) configuration mode 2X NOR FLASH
Communication Interface
PCI Express X16 (1st, 2nd or 3 generation)
2 x qsfp28 four-fiber cage (2 x 4 XCVR: 28 gb / s per link), support 10GBE / 40GBE / 100GBE
Other protocols supported by QSFP28 modules
storage
Onboard DDR4, 2X group 64-bit + 4-bit ECC, total 8GB
Onboard QDR-II +, 2X storage area, 18 digits, a total of 144MBITS
power
Maximum 100W
Provide custom radiator
Other resources
Onboard programmable PLL oscillator (Si5345), highly flexible and configurable clock generators.
Onboard High Accuracy Oscillator provides clock accurate 20MHz-0.05ppm for accurate time protocol (PTP) Ethernet, synchronous protocol Standardization IEEE 1588
A coaxial connector for PPS (pulse per second) allows multiple electronic components to synchronize
Reflex CES XPRESSVUP-LP9P Hardware block diagram as shown below:
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It is worth mentioning that XPressVUP supports CAPI 2.0 on the Power9 CPU Host Processor (IBM), and also supports the IBM SNAP framework, with a few FPGA expertise, SNAP framework allows application engineers to quickly create FPGAs in server environments Acceleration program. It uses the IBM CAPI 2.0 interface that can be run on a standard PCIe physical channel, but there is a low delay between CPU and FPGA and the advantage of consistent memory sharing.
DIGILENT NETFPGA-SUME
Netfpga-Sume is a cooperative program between Digilent, Cambridge University and Stanford University, is an ideal platform for high performance and high-density network design.
Netfpga-Sume uses Sailive Virtex-7 690T FPGA, supports 30 13.1 GHz GTH transceivers, four SFP + 10GB / S ports, five separate high-speed memory groups, from 500MHz QDRII + and 1866MT / s DDR3 SODIMM devices Build, as well as an eight-channel third-generation PCIE, providing large throughput and supports a large number of high-speed data streams FPGA architecture and storage devices, including 20 transceivers on the FMC and QTH expansion connector and SATA ports. .
The main task of Netfpga-Sume is to provide the most advanced network platform for students, researchers and developers. Whether it is learning basic knowledge or creation new hardware and software applications, the board can easily support four 10Gb / s Ethernet ports. At the same time, the line speed is processed and the data can be operated and processed on the board.
Digilent NetFPGA-SUME features:
XILINX VIRTEX-7 XC7V690T FFG1761-3
Xilinx CPLD XC2C512 for FPGA configuration
PCIe Gen3 x8 (8Gbps / channel)
Two 512MBITS Micron Strataflash (PC28F512G18A)
Programming: Sailive Vivado Design Suite
Three x36 72MBITS QDR II SRAM (CY7C25652KV18-500BZC)
Two 4GB DDR3 SODIMM (MT8KTF51264HZ-1G9E1)
MICRO USB connector for JTAG programming and debugging (shared with UART interface)
A Micro USB cable for programming / uart
Qth connector (8 Rocketio GTH transceivers)
Four SFP + interfaces (4 Rocketio GTH transceivers, support 10Gbps
Two SATA-III ports
User LED and button
An HPC FMC Connector (10 Rocketio GTH Transceivers)
A PMOD port
It is Digilent's demo video about Netfpga-Sume FPGA development board. If you are interested, you can take a look:
Summarize
The power of FPGA is its super flexible programmable ability. As artificial intelligence is increasingly affected by the market, whether GPU or dedicated AI chip is not like FPGA to facilitate new enterprises, innovation, With this kind of benefits, I believe that the spring of FPGA is still very long.
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