74HC595 Take the actual programming case

74HC595 has a shift register and an 8-bit output latch output with an 8-bit serial input parallel output. 74HC595 is a 8-bit serial input, a displacement buffer outputted in parallel: parallel output is a triple output. At the rising edge of SCK, the serial data is input from the SDL to the internal 8-bit displacement buffer, and is output by the Q7 ', and the parallel output is the data departure of the 8-bit displacement built in the rising edge of the LCK. Bit parallel output buffer. ; ================================================ 74HC595 Take the horse light demo ; Creative Date: 2007/08/012 Creator: Give me a smoke ; ================================================ SDATA_595EQUP1.0; Serial Data Enter SCLK_595 EQUP1.1; shift clock pulse RCK_595EQUP 1.2; Output latch control pulse ; ================================================ ORG0000H Ljmpmain ORG0030H ; ================================================ MAIN: Movsp, # 60h Movr0, # 0FEH MAIN1: Call Out_595 Calldelay Mova, R0 RLA Movr0, A JMPmain1 ; ------------------------------------------------- ---------------- Output latch output data subroutine ; ------------------------------------------------- ---------------- OUT_595: LCALL WR_595 CLRRCK_595 NOP NOP Setb rck_595; rising edge to send data to output latch NOP NOP NOP CLRRCK_595 RET ; ------------------------------------------------- ------------- ; Shift register receives the data subroutine ; ------------------------------------------------- ------------- WR_595: Mov R4, # 08h Mov A, R0 WR_LOOP: RLC A MOV SDATA_595, C Setb SCLK_595; Rising edge occurs NOP NOP CLR SCLK_595 Djnz R4, WR_LOOP RET ; ------------------------------------------------- ------------- Delay subroutine ; ------------------------------------------------- ------------- DELAY: Movr5, # 03h DEL0: Movr6, # 0ffh DEL1: Movr7, # 0ffh Djnzr7, $ Djnzr6, DEL1 Djnzr5, DEL0 RET ; ------------------------------------------------- ---------------- End, read full text

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