Circuit function and advantage
This circuit is a H bridge consisting of high power switch MOSFET, controlled by low voltage logic, as shown in FIG. This circuit provides a convenient interface for low logic signals and high-power bridges. The high end and low ends of the H bridge use low cost N-channel power MOSFET. This circuit is also available between the control side and the power supply side. This circuit can be used in applications such as motor control, power conversion, illumination, audio amplifier, and uninterruptible power supply (UPS).
Modern microprocessors and microcontrollers are generally low-power consumption, using low power supply voltage. 2.5 V CMOS logic output source current and suction flow in μA to MA range. In order to drive a 12 V switch, the H bridge of the 4 A peak current must be carefully selected, especially when it requires low jitter.
The ADG787 is a low-voltage CMOS device, built-in two independently optional single-knife double throw (SPDT) switches. When using a 5 V DC power supply, the effective high level input logic voltage can be as low as 2 V. Therefore, the ADG787 can provide a conversion of the 2.5 V control signal required to drive the half bridge driver ADUM7234 to 5 V logic level.
The ADUM7234 is an isolated half-bridge gate driver that provides independent and high-end and low-end outputs, which can be used specifically to use N-channel MOSFETs specifically in the H bridge. There are a variety of benefits using N-channel MOSFET: N-channel MOSFET is usually only 1/3 of the P-channel MOSFET, the maximum current is higher; the switching speed is faster, the power consumption is reduced; the rise time and the fall time It is symmetrical.
The 4 A peak drive current of the ADUM7234 ensures that the power MOSFET can be on and off at high speed, so that the power consumption of the H-electric bridge is minimal. In this circuit, the maximum drive current of the H bridge can be as high as 85 A. It is limited by the maximum allowable MOSFET current.
The ADUC7061 is a low power consumption, ARM7-based precision analog microcontroller, integrated pulse width modulation (PWM) controller, which can be used to drive the H bridge after appropriate level conversion and conditioning.
Figure 1. H-bridge using the ADUM7234 Isolated Half Bridge Drive (Schematic: Differential Pack and All Connections)
Circuit description
2.5 V PWM control signal level transition to 5 V
EVAL-ADUC7061MKZ provides a 2.5 V logic level PWM signal, but the minimum logic high level input threshold at the ADUM7234 at 5 V power supply is 3.5 V. Due to this incompatibility, the ADG787 switch is used as an intermediate lead converter. The minimum input logic high level control voltage of the ADG787 is 2 V, compatible with the 2.5 V logic of the ADUC7061. The output of the ADG787 is switched between 0 V and 5 V, which is sufficient to drive the 3.5 V threshold ADUM7234 input. The evaluation board provides two jumpers to facilitate configuring the polarity of the PWM signal.
H Bridge Introduction
The H bridge shown in Figure 1 has four switching elements (Q1, Q2, Q3, Q4). These switches are paired, the left (Q1) and the lower right side (Q4) are pair, the lower left side (Q3) and the upper right side (Q2) are pair. Note that the switches on the same side of the bridge will not be turned on simultaneously. The switch can be implemented using a MOSFET or IGBT (insulated gate bipolar transistor), and other control signals of the pulse width modulation (PWM) or the controller are turned on and disconnected to change the polarity of the load voltage.
The source of the low-end MOSFET (Q3, Q4) is grounded, so the gate drive signal is also referenced. The source voltage of the high-end MOSFET (Q1, Q2) is switched as the MOSFET is turned on and off, and therefore, the gate drive signal should be referred to or "bootstrap" to the floating voltage.
The gate drive signal of the ADUM7234 supports real current isolation between the input and outputs. Compared with the input, the output of the output is up to ± 350 VPEAK, thus supporting low-end switching to negative voltage. Therefore, the ADUM 7234 can reliably control the switching characteristics of various MOSFET configurations within a wide positive or negative switching voltage range. To ensure safety and simplification test, 12 V DC power is selected as the power supply for this design.
Subwelling gate drive circuit
High-end and low-end gate driver power supplies are different. The low-end gate drive voltage is referenced, so the drive is powered by DC power supplies. However, the high-end is suspended, so it is necessary to use the bootstrap driving circuit, and the working principle is as follows.
The left side of the H-bridge circuit shown in Fig. 1 is observed, and the boot drive circuit is realized by the capacitance C1, the resistors R1, and R3, the diode D1. After power-on, PWM will not occur immediately, and all MOSFETs are highly blocked until all DC voltages are created. During this time, the capacitor C1 is charged by the DC power supply through paths R1, D1, C1, and R3. The charged capacitor C1 is charged offers a high-end gate drive voltage. The time constant of C1 is τ = (R1 + R3) C1.
When the MOSFET is switched under the control of the PWM signal, the low-end switch Q3 is turned on, and the high-end switch Q1 is disconnected. The high-end GNDA pulls to the ground, and the capacitor C1 is charged. When Q1 is turned on, Q3 is turned off, and GNDA pulls to the DC supply voltage. The diode D1 reverse offset, the C1 voltage drives the VDDA voltage of the ADUM7234 to about 24 V. Therefore, the capacitor C1 maintains a voltage of about 12 V between the VDDA and GNDA pins of the ADUM7234. Thus, the gate driving voltage of the high-end MOSFET Q1 is always referred to the suspended source voltage of Q1.
High-end MOSFET source voltage spike
When Q1 and Q4 are turned on, the load current flows from Q1 to Q4 and ground. When Q1 and Q4 are turned off, the current flows in the same direction, through the continuation of the diode D6 and D7, generating a negative voltage spike on the source of Q1. This may damage some of the gate drivers that use other topologies, but there is no effect on the ADUM7234, and the ADUM7234 supports low-end switching to negative voltage.
Self-raised capacitance (C1, C2)
When the low-end drive is turned on, the bootstrap capacitance will be charged, but it is discharged only when the high-end switch is turned on. Therefore, the first parameter that needs to be considered when choosing the boiled charge value is the maximum allowable pressure drop when the high-end switch is turned on and the capacitance is used as the high-end DC power source of the gate driver ADUM7234. When the high-end switch is turned on, the DC supply current of the ADUM7234 is typically 22 mA. It is assumed that the on-circuit switch is 10 ms (50 Hz, 50% duty cycle), using formula C = I ΔT / ΔV, if the allowable pressure drop ΔV = 1 V, I = 22 mA, Δt = 10 ms, Then, the capacitance should be greater than 220 μF. This design selects 330 μF capacitance. After the circuit is powered off, the resistor R5 discharges its own capacitance; when the circuit switches, R5 does not work.
Self-lifting stream resistance (R1, R2)
When charging the boiled charge, the series resistance R1 functions as a current limitation. If R1 is too high, DC static current from the ADUM7234 high-end drive power will cause excessive pressure drop in R1, and the ADUM7234 may undermine. The maximum DC power current IMAX = 30 mA of ADUM7234. If the R1 voltage caused by the current is limited to VDROP = 1 V, R1 should be less than VDROP / IMAX, or 33 Ω. Therefore, this design selects 10 Ω resistance as a self-raised resistance.
Subload start resistance (R3, R4)
Resistance R3 initiates the bootstrap circuit. After power-on, the DC voltage will not be established immediately, and the MOSFET is disconnected. Under these conditions, C1 is charged by the paths R1, R3, D1, Vs, and the process is as described above:
Where VC (t) is a capacitance voltage, VS (for the supply voltage, VD (for diode pressure drop, τ is time constant, τ = (R1 + R3) C1. The circuit value is as follows: R1 = 10 Ωvc1 = 330 μF, VD = 0.5 V, vs = 12 V. From the above, when R3 = 470 Ω, the capacitance charges to the final value of 67% require a time constant time (158 ms). The larger the resistance value, the capacitance charging time The longer. However, when the high-end MOSFET Q1 is turned on, there will be a 12 V voltage on the resistor R1, and therefore, if the resistance value is too low, it may consume considerable power. For R3 = 470 Ω, 12 V, this resistance The power consumption is 306 mW.
Overvoltage protection of self-raised capacitance (Z1, Z2)
As described above, for the sensing load, when the high-end MOSFET is disconnected, the current flows through the expansion diode. Due to the resonance between the inductance and the parasitic capacitance, the charge energy of the boiled capacitor may be higher than the energy consumed by the ADUM7234, and the voltage on the capacitor may rise to an overvoltage state. 13 V Zener diode clamps the voltage on the capacitor, thereby avoiding overpressure.
Gate drive resistance (R7, R8, R9, R10)
The gate resistance (R7, R8, R9, R10) is based on the required switching time TSW. Select. The switching time refers to the time required to charge the CGD, CGS, and Switch MOSFETs to the required charge QGD and QGS.
Figure 2. ADUM7234 power rail filtering and undervoltage lock protection
Description Gate Drive Current IG:
Wherein, VDD is the equivalent resistance of the power supply voltage, RDRV is the gate driver ADUM 7234, and the VGS (TH) is a threshold voltage, and the RG is the external gate driving resistor, the QGD and QGS required MOSFET charge, TSW as required switching time.
The equivalent resistance of the ADUM7234 gate driver is calculated by the following formula:
According to the ADUM7234 data manual, for VDDA = 15 V and output short-circuit pulse current IOA (SC) = 4 A. It is understood by equation 3, and RDRV is about 4 Ω.
According to the FDP5800 MOSFET data sheet, QGD = 18 NC, QGS = 23 nc, VGS (TH) = 1 V.
If the required switching time TSW is 100 ns, the RG is solved by the equation 2, and the RG is about 22 Ω. The actual design selects 15 Ω resistors to provide a certain margin. Technology area
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