ARM Releases Cortex-A78 latest CPU architecture: 5nm process, performance violence 20%, power consumption is reduced by 50%

ARM officially launched a new generation of CPU architecture - Cortex-A78, using a 5nm process process, with a performance of 20%, and power consumption is reduced by 50%. . ARM is a streamlined instruction set family that is expected to be an architecture version every 8. The ARM architecture is a streamlined command set (RISC) processor architecture family, which is widely used in embedded system design, characterized by low cost, high efficiency and low power consumption, cover consumer electronics, carrying devices, computer accessories equipment Wait. ARM said that the architecture performance of Cortex-A78 (i.78) only increased by 7%, power consumption reduced by 4%, and the kernel was 5%, and the quad-core area was reduced by 15%. The Cortex-A78 has a frequency of 3.0 GHz, while Cortex-A77 is only 2.36GHz. In addition, Mali-G78 completely rewrites the FMA (fused multiplication) engine, saving 30% power consumption. At the same time, ARM also launched the first flagship GPU - Mali-G68, architecture, characteristics and MALI-G78, the only difference is that you can only support up to 6 cores, while the core of Mali-G78 is 24. Finally, ARM also launched a Cortex-X1 architecture that is different from Cortex-A78, the former pursues the ultimate performance, and the latter is more focused on performance, power consumption and volume. Cortex-X1 is the first commercial product of ARM "CXC Project". Compared with Cortex-A78, the integer calculation performance of Cortex-X1 has increased by 23%, and the machine learning ability has also increased twice. In general, the processor architecture of smartphones is unlikely to use 4 Cortex-X1, 1 Cortex-X1 and 3 Cortex-A78 probability will be larger. This match is only a 15% space than the four-core Cortex-A76, but monoconuclear performance will be further improved. The volume of Cortex-X1 is much larger than Cortex-A78. The maximum capacity of L2 cache is 1MB. The bandwidth is twice as the original, and the performance can be maximized, and the shared L3 cache can reach 8MB, which is a few generations of cache. double. If there is no accident, the future smartphone processor may use 1 Cortex-X1 + 3 Cortex-A78 + 4 A55 scheme, which can guarantee single core performance and better control the power consumption of the CPU. It is two in one fell swoop. Be This article material content integrated from the network

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