The MCS-51 single-chip microcomputer has a full-duplex serial communication port, that is, serial reception and transmission buffer (SBUF), which can receive data or send data either physically. However, the receiving buffer can only read the unwritten, and the send buffer can only write, and their address is 99h. This communication port can be used in network communication, and serial asynchronous communication can also be implemented, and can also be used in synchronous shift registers. If a level converter is added over the input / output pin on the transfer, the standard RS-232 interface can be conveniently constituted. Here we introduce them separately.
[1] Basic concept
Data communication transmission mode
It is often used in data communication with single work, semi-duplex, full-duplex and multi-workers.
Single work mode: Data is only transferred in a fixed direction. Thus, this transmission method is limited, and it is common to print data transmission between serial ports and data acquisition between simple systems.
Half-duplex mode: Data can achieve two-way transmission, but not simultaneously, the actual application uses some protocol to implement reception / switched switch conversion.
Full-duplex mode: Allow both parties to simultaneously transmit data two-way transmission, but generally the line and equipment of the general duplex transmission method are more complicated.
Multiple Works: The above three transmission methods are transmitted with the same line. In order to fully utilize line resources, the frequency division, time division or code division multiplexing can be used by using multiple multiplexers or multiplex hubs. Technology, you can realize the resource sharing function on the same line, we are in a multi-worker transmission mode.
Two forms of serial data communication
Asynchronous communication
In this communication method, the receiver and transmitter have their own clocks, their work is non-synchronous, asynchronous communication with one frame represents a character, the contents are as follows: one start bit, only a number of data bits Fig. 2 is a data format that transmits 45h.
Synchronous communication
In the synchronous communication format, the transmitter and receiver are controlled by the same clock source. In order to overcome in asynchronous communication, each transmission one frame must be added to the start bit and stop bit, occupying the transmission time, and transmitted data In large occasions, the speed is much slower. The synchronous transmission mode removes these starting positions and stop bits, and only send a synchronous head (character) flag first when transmitting data blocks.
Synchronous transmission mode is fast than asynchronous transmission mode, which is its advantage. However, synchronous transmission methods also have its shortcomings, that is, it must use a clock to coordinate the operation of the transceiver, so it's more complicated.
Transmission rate of serial data communication
The serial data transfer rate has two concepts, namely the number of bits BPS (Bit Per Second) and the Bit Per Second, the Band Rate, and the baud rate and the modulation rate in communication with the modem. related.
[2] The serial port and control register of. MCS-51
Serial port control register
The MCS-51 single-chip serving port register structure is shown in Figure 3. SBUF is a serial port transceiver buffer, which is an addressable dedicated register containing a receiver and a transmitter register that enables full duplex communication. But the two registers have the same address (99h). The serial data transmission of the MCS-51 is simple, and data can be transmitted as long as the data is written to the transmit buffer. The data can be received from the receiving buffer to read the data.
In addition, it can be seen from the figure that the first-stage input shift register is added before the receiving buffer, and the structure of the MCS-51 is to avoid data frame overlapping phenomena when receiving data, so as to avoid error, some literature say this structure. For the double buffer structure. This setting does not need to be set when sending data, because when sending, the CPU is active and this phenomenon cannot occur.
Serial communication control register
In the previous section we have analyzed the SCON control register, it is an addressable dedicated register for serial data communication control, the unit address is 98h, and its structural format is as follows:
Table 1SCON register structure
Scon
D7
D6
D5
D4
D3
D2
D1
D0
SM0
SM1
SM2
Ren
TB8
RB8
Ti
Ri
Bit address
9fh
9EH
8DH
9ch
9bh
9ah
99h
98H
Below we have described the functionality of each control bit:
(1) .SM0, SM1: Serial port work mode control bit.
SM0, SM1 work mode
00 mode 0
01 mode 1
10 way 2
11 way 3
(2) .SM2: Multi-machine communication control bit.
Multi-machine communication is working in ways 2 and mode 3, and the SM2 bits are mainly used in ways 2 and mode 3. The receiving state, when the serial port is operated in mode 2 or 3, and SM2 = 1, only when the 9th bit data (RB8) is received, the resulting top 8 bit data is sent to SBUF, and the setting The bit ri issued an interrupt request, otherwise the received data will be abandoned. When SM2 = 0, no matter whether the first data is 0 or 1, it is difficult to send SBUF, and issue an interrupt application.
When working in mode 0, SM2 must be 0.
(3) .r: Allow the reception bit.
Ren is used to control the allowable and prohibition of data reception, and when ren = 1, it is allowed to receive, ren = 0, prohibit reception.
(4) .tb8: Send the received data bit 8.
In the modes 2 and mode 3, TB8 is the 9th bit data bit to be sent. The same also transmits this bit in the multi-machine communication, and it represents the transmitted address or data, TB8 = 0 is data, TB8 = 1 is the address.
(5) .rb8: Receive data bits 8.
In the modes 2 and mode 3, RB8 stores the received ninth bit data to identify the received data characteristics.
(6) .ti: Send an interrupt flag.
Addressable marking. At the time of the mode 0, after sending the 8th bit, after the hardware is set, in other ways, the hardware is set by the hardware before sending or stopping the bits, and therefore, Ti = 1 represents the end of the frame transmission, and Ti can be "0" by software.
(7) .ri: Receive interrupt flag.
Addressable marking. After receiving the 8th bit, the bit is set by hardware, and the bit is set by hardware, and Ri = 1 represents the completion of the frame reception.
Power Management Register PCON
The PCON is mainly a dedicated register set for the power control of the CHMOS single chip microcomputer. The unit address is 87h, and its structural format is as follows:
Table 2PCON Power Management Register Structure
PCON
D7
D6
D5
D4
D3
D2
D1
D0
Bit symbol
SMOD
-
-
-
GF1
GF0
PD
Idl
In the chmos type single-chip, except for the SMOD bit, other bits are dummy, Smod is a serial port bass increase, when SMOD = 1, serial port bass is doubled. System reset is default to SMOD = 0.
Interrupt Allow Register IE
The interrupt allows the register that has been set forth in the previous section, where the bit ES affecting the serial port is referred to. ES is a serial interrupt allows control bit, and ES = 1 allows serial interrupts, ES = 0, and serial interrupts are prohibited.
Table 3IE Interrupt Allow Control Register Structure
Bit symbol
EA
-
-
ES
ET1
EX1
ET0
EX0
Bit address
AFH
AEH
ADH
ACH
Abh
AAH
A9H
A8H, read the full story
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