In military and aerospace applications, different and incompatible radios large numbers constitute a serious problem, because in these areas, working groups may require different means for airborne links, satellite communications, relay base station, emergency transmitter, and the particular application object (e.g., UAV operation). Wherein each radio link plays a vital role, will miss one of the operations team to lose the resources needed. However, the radio in size, weight and the like need to be considered a backup battery costs. With the addition of new requirements and the new link, the problem becomes more complex.
FIG 1: AD9361 is a 2 x 2 direct conversion transceiver IC, the operating frequency range of 70 MHz to 6 GHz, with from 200 kHz to 56 MHz bandwidth and the user can adjust the resolution of 12-bit converter
The solution is obvious, at least in theory, it is this: a versatile full-duplex radio modules can be used on all platforms, and can dynamically reconfigure as needed in the field. If we can achieve "A radio" target, the result will reduce the burden, bring flexibility and versatility, efficiency, using a set of batteries to work longer, so as to form a huge size, weight, and power (SWaP) Advantage. This is the Joint Tactical Radio System (JTRS), the basic premise software-defined radio (SDR) and other programs.
However, to make this concept a reality common radio is much more difficult than expected. Although the Moore's Law to meet practical needs promote high performance, low-power processors (including the deployment of FPGA) widely available, but the difficulty of providing a suitable integrated analog front end (AFE) is much bigger. The need for such functional modules has a complex, diverse and urgent three characteristics, can be functional blocks located between the antenna and the processor, is the interface between the real world and the digital world signals.
Until recently, the utility of such an analog front end for a multi-functional radio also needs overlapping parallel array of channels, each channel intended to cover a specific frequency band of the radio spectrum, bandwidth matches the target signal format. Although this method is feasible, but in the final cost of PC board space, weight, cost, and power consumption is very high.
High-performance single-chip analog front-end solutions
Agile transceiver is a platform solution in which a series of products, the series comprising AD9364 RF transceiver IC. AD9361 RF agile transceiver is a wideband programmable front-end transceiver supports dual independent channels for rapid growth the multiple-input, multiple-output (MIMO) segment as well as non-MIMO market, to meet the challenging requirements of the SDR, the SDR concept closer to reality. The system processor may be dynamically reconfigured critical parameters (e.g., bandwidth and RF frequency) to meet the application requirements, leading to the best results. The device also contains a variety of characteristics, it can support various frequency agile protocol.
ADI's AD9361 RF This 10 x 10 mm chip-scale device (FIG. 1) Bandwidth using user adjustable design, ranging from 200 kHz to 56 MHz, has a wealth of other characteristics and performance properties, it can be used to construct from 70 MHz to signal chain to 6 GHz. The 2 x 2 using a direct conversion assembly, the entire analog front end may be reduced to a relatively simple circuit. It is connected through a CMOS or LVDS interface with a host processor, in order to enhance the speed, ease of operation. IC integrated 12 bit A / D and D / A converter, a fractional-N frequency synthesizer, digital and analog filters, automatic gain control (the AGC), the transmission power monitoring, and other critical functions quadrature correction.
In addition to having a high degree of integration, its RF, analog, and mixed-signal properties - including a receiver noise figure less than 2.5 dB and the transmitter EVM (Error Vector Magnitude) exceeds -40 dB, while the transmitter is below the noise floor -157 dBm / Hz-- equally impressive. For the transmit and receive paths, the local oscillator in steps of 2.5 Hz, fine tuning can be achieved. Although many functions integrated IC, the power consumption is very low, typically about 1 W.
Figure 2: System Developer By slightly hardware settings, can use AD9361 FMC board development, debug, evaluate and adjust the Xilinx FPGA SDR applications
System design is not just IC
Like flexible broadband software defined radio as complex design involving a large number of circuit design, and algorithm development work and a number of trade-offs, because of this, AD9361 there is a complete reference design, specifically for Xilinx FPGA applications optimized. ADI's AD-FMCOMMS2-EBZ FMC plate (FPGA Mezzanine Card) by a linker Xilinx FMC is connected to the motherboard, to provide power and bandwidth, provide support (FIG. 2) using 2 x AD9361 2 channel configuration. The board is fully customizable through software, while eliminating the need to change any hardware, provide additional configuration options for various MIMO.
The reference design includes schematics, layouts, BOM, HDL, Linux driver and application software, including all the important details of materials to verify the performance, rapid prototype production system needs. Outside the low-end software and firmware, users can also get support for Simulink and MATlab, so code development and implementation of radio algorithms and performance adjustment.
Because of this small, flexible high performance IC substituted numbers of discrete circuit, the surface, the demand for such discrete design has ceased to exist. But the fact is not necessarily so, as discrete analog front-end design for a specific frequency band, format and bandwidth of software defined radio frequency range, if well-designed, carefully debugging rational layout Further, its performance in this particular frequency band are may exceed AD9631 IC, although its large size.
But the real problem is in software-defined radio, analog front end has a very wide bandwidth, it requires a lot of these front-end for a particular spectrum, and one each in the front-end design and evaluation is a huge challenge as a result, the final product size, weight and power consumption in the three indicators ranked fallen off. Thus, after several weigh scales heavily biased towards an end AD9361 IC, the RF performance of the device exceeds the needs of most application scenarios, but also much less disadvantages.
The IC is true, the FMC and the tool plate is also true, and has been designed into the product of two existing software defined radio, i.e. Ettus Research Universal Software Radio peripherals (the USRP) and Epiq Solutions of multichannel can Maveriq rearrangement RF transceiver.
Whether the system engineer is willing to use ADI FMC, has been on the market or use of software defined radio platform, to carry out the design and development of software-defined radio, using the AD9361 and achieve overall product packaging and performance will give them a huge lead .
Author: Duncan Bosworth
ADI Aerospace and Defense Products Marketing Engineer
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Source: WISDOM Network
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