"The card reader system designed in this paper takes a PICL6F7X microcontroller as a master chip, and uses Mifare S50 card, and the card reader is communicated with 106kbps rate at 106kbps, and the anti-conflict processing during the card reader is implemented and the content of the card E2PROM block. / Write and other functions. The card is set to store the card data inside the card reader. When the FLASH capacity is full, all data can be read through the hosting machine to the management center, which is easy to establish the card data. Integrated management system.
1 hardware system design
The card reader hardware block diagram is shown in Figure 1.
Single chip PICL6F7x is connected to RC 522 and Flash chip AT45D011 via the SPI bus, while connecting the Ethernet interface chip C58900 with a simplified ISA bus to provide the ability to connect to the local area network. The AT45D0LL storage capacity is LMB, and more than 7,400 sets of MIFARE E2PROM blocks and UID numbers can be stored, and the amount of storage capacity of the information read within one day is provided. For the design of the RC522 antenna part, Philips has a special manual, and details will not be described later. The RC522's SPI bus interface has its own timing requirements. It can only work from the mode, the transmission rate is 10 Mbps, and the data and clock phase relationship satisfy "idle clock is low, synchronously receive and transmit data in the clock rising and transmitted, in the falling edge data conversion". The PICL6F7x series single-chip peripherals include one SSP module. The module can be configured to use the SPI interface to control the data transfer rate of the SPI interface, the data transfer parameters such as the data transmission rate of the SPI interface. In this paper, the SSP module is configured to operate in SPI main mode, and the clock is 1/4 single-chip frequency, receiving, and transmitting data occur in the clock rising edge.
It should be noted that due to a variety of digital interfaces supported by RC522, the chip detects an external pin connection relationship at each reset. For the SPI interface, the relevant pins of the RC522 must be configured according to the connection relationship shown in FIG.
In addition to the universal 4 SPI signal lines (clock, input data line MOSI, output data line MOSO, and check line NSS), the RC522 requires additional 2 pin I2C and EA to fix low level and high level, respectively. . These two pins do not participate in the SPI bus transmission, only the role of the RC522 digital interface adopts the SPI interface. In addition, the chip select signal must be guaranteed to be low in writing data flow, while the countless basis is written, it is high; the user may not set NSS low power for saving PIC microcomputer lead resources. flat.
2 software system design
Compared to other 14443 base station chips (such as RC500, RC530, etc.) produced by Philips, RC522 simplifies the internal system structure and removes E2PROM. This greatly reduces the chip command set. Further, the control of the carrier modulation circuit, the transmission circuit, and demodulation, the control of the decoding circuit is also simplified, and the calibration receiving circuit I clock, Q clock, calibration transmission and reception clock phase are cumbersome operations. In general, the communication flow of the single-chip microcontroller and RC 522 is shown in Figure 3.
Different states may occur during the communication process based on the control flow data transmitted by the RC522 and Mifare. It is the difficulty of software system development for various states. The following is given in the RC522 command concentration, the communication status and processing that may encounter during execution of the TRANCEIVE and MFAUTHE-NT. These two commands are implemented to the MIFARE card, and the data and encryption function are transmitted. In fact, all operations for the Mifare card can be completed by them, including Request, Anticollision, SELECT, READ, WRITE, and more.
2.1 Implementation of the RC522 command set
The main status indication registers of RC522 include ComiRQREG, ER-RorReg, Status2Reg, and FIFOLREG. Software Processing: The internal interrupt state of the RC522 is obtained by COMIRGREG; the communication process information of the RC522 and MIFAR card is determined by the interrupt to determine whether the next procedure is performed; if the interrupt indication has an error, you need to further read the content of ErrorReg, Returns the wrong word here.
2.1.1 Tranceive Command
The specific implementation process of the TRANCEIVE command; reads all the data in the RC522 FIFO, transmitted through the communication interface to the MIFARE card through the communication interface after the baseband encoding and digital carrier modulation; after the transmission is completed, the radio frequency signal transmitted without a MIFARE card is detected after the transmission is completed. Respond and will be demodulated by the received signal, and then add the FIFO. Analyze the above TTANCEIVE command execution process, you can get the algorithm flow diagram of the command, as shown in Figure 4.
In order to process the MIIFARE card in the electromagnetic field generated by the card reader, the timer inside the RC522 chip is enabled from the case where the process is taken from the excitation field. If the card response is not obtained exceeds the set time, the communication with the card is aborted, and the "card has no response" error message.
It can be seen from FIG. 4 that the processing method of the TRANCEIVE command is to return various error status words according to the content of the relevant communication status indication register. If a conflict is wrong, the bit conflict position is further returned. The TRANCEIVE command does not process the bits-oriented frame, which may only appear in the MIFAR card anti-collision cycle. In order to maintain the generals of the various MI-FARE card commands, this command only complements the transmission and reception of the frame, and does not process the frame information, all bit conflict processes the function outside the function.
It should be noted that the TRANCEIVE command cannot be automatically aborted. When returning from this command, you must execute the IDLE instruction to transfer the RC522 into the idle state.
2.1.2 mfauthent command
The RC522 simplifies encryption operations with the Mifare card, with a mfauthent command instead of the original RC500 required for Authes and Authent2. The endhend command execution is to turn on the Encrypted unit of the RC522. After the instruction is executed, the communication information between the RC522 chip and the Mifare card will be encrypted first, and then transmit it through the RF interface. Essentially, Mfauthent is a variable TRANCEIVE command, which is consistent with Figure 4. However, the internal communication state of the RC522 chip has been processed accordingly, and the command is automatically aborted, so the user only needs to detect the timer state and the error register status to determine the execution. In fact, the MfautheTheThent may only have an error state (RC522 and MI-FARE card letterframe format error), at this time, the command cannot open the encrypted unit, and the user must re-execute the operation.
The RC522 will read the 1-byte mode, the L-byte E2PROM block, 6-byte key, and 4-byte RF card UID number, etc., and must guarantee this 12 before the command execution is executed. Byte data is saved in FIFO. There are two types A key and B key, and the A key is generally selected.
Mfautllent can only guarantee that four blocks in one sector of the Mifare card decryption, to operate the data users of other sectors must also initiate the operation of the sector.
2.2 Mifare Card Operation Directive
Operating instructions for Mifare cards include queries, anti-conflicts, selection cards, read / write E2PROM blocks. Among them, the anti-conflict command is the essence of the 14443A protocol, and the difficulty is difficult. The software implementation method of the anti-collision algorithm will be introduced below.
2.2.1 Anti-conflict Directive
14443A Standard Definition Anti-Conflict Algorithm is essentially a channel multiplexing method based on channel time division multiplexing. When a plurality of RF cards occupy a radio frequency channel with the card reader at a time, the card reader will detect the conflict position of the bitstream; then restart the communication process of another and the radio card, in the process, in the process, the conflict position The bit value is set to the determined value (generally 1) to expand the binary search until the conflict error is detected. There are 4 bytes in the MIFARE card, and the purpose of RC522 anti-conflict processing is to finalize the UID of the Mifare card. 14443A The standard anti-conflict instruction format is as follows:
Where: command code "93" represents only 4 bytes to be processed; NVM represents the correct bits in the UID domain of this anti-conflict command; BCC bytes only in NVM 70 (ie 4 bytes of UID) It's all correctly, it exists, it indicates that the entire UID is recognized and the anti-collision process ends.
The anti-punching algorithm flow chart is shown in Figure 5.
The NVM initial value is 20, indicating that the command contains only 2 bytes, ie "93 + 20", without UID data, the Mifare card must return all UID bytes as a response. If the returned UID data has a bit conflict, the NVM value is updated according to the conflict position. It can be seen that in the search cycle, as the UID is known, NVM is increasing until 70. It indicates that in addition to the "93 + 70" two command bytes, there are UID0 ~ UID3 and BCC 5 UID data bytes. At this point, the command byte has a total of 7, and the conflict command transforms to the card selection command.
If the conflict process encounters the case where the bit-to-bit frame is encountered, the communication control register bitframingReg must be pre-set in advance. This register indicates a number of bits in one byte of the send frame and the incomplete bits in the receiving frame bytes.
2.2.2 Card and write card
The 14443A protocol does not specify the read and write operation of the RF card, so the read and write operations of each card must be considered in the form of organizational form and response form. The MIFARE card internal memory is composed of E2PROM, which is divided into 16 sectors, 4 blocks per sector, 16 bytes per block. The read and write to E2PROM is performed in blocks, ie read / write 16 bytes.
Take a write card command as an example, the Mifare card requires two steps, and the instruction format is as described below.
Setp A: Query block status.
If the block is ready, the MIFARE card returns a 4-bit response. If the value is 1010, the next step can be performed; if the value is not 1010, the block is not ready, and must wait until the block is ready.
Step B: Write data.
If the write is successful, the Mifare card returns a 4-bit response, and the value is still 1010; if it is not LOL0, the write failed.
The card reader format is as follows:
If the execution is successful, the MIFARE card returns 18-byte response bits. It should be noted that only 16 bytes of one byte are the block data read, and the other 2 bytes are filled bytes. If the number of bytes is not 18, the read card operation error can be judged.
Mifare card data is encrypted in a sector, encrypts only one sector of the sector. This provides a convenient implementation of the "one cartoon" function, and users can store various purpose application data in different sectors. One of the common applications in the actual life is the electronic wallet, and the write operation of the card must be carried out in a certain format. The data composition of a block is as follows:
Note: The address value is meaningless, but the value must be stored in 4 to 7 bytes when writing.
2.3 Reader Overall Software Design
The software design idea of the card reader is to use the RC522 TRANCEIVE command as a standard function, and the MIFAR card operation instruction is implemented by calling this function. The Mifare card is shown in Figure 6. Its point is to transfer the card to sleep to sleep, decrement the number of cards that may conflict until all cards are operated, and the conflict function is not a card response.
The RC522 chip must be reset before each use, in addition to the hopping edge of the reset pin NRSTPD input from a low level to a high level, must also write a soft reset command code 0x0i to the RC522 command register 0x0i? . Before using the RC522 operation of the MiF'RAE card, the user must set the working state of the chip simulation portion. According to the experience of the pen, the RC522 modulation, the demodulation method can be used by the default setting; at the 106 kbps communication rate can be used normally, but must ensure that the antenna drive interface opens, it can be implemented by setting the TX-ControlReg register. Further, since the 14443A protocol adopts the ASK modulation of the modulation depth of 100} ", this is different from the default setting, so the TXASKRC must be set accordingly to implement the modulation method.
The communication parameter setting of the RC522 is complex, which can regulate the modulation phase, the modulation bit wide, the radio frequency signal detection intensity, the transmission / reception speed, and the like settings. During the hardware debugging process, the user can select the form of settings suitable for itself according to the actual situation.
Conclusion
The card reader designed in this paper is 50 mm at 106 kbps communication rate. Attendance, the electronic wallet function can be achieved. The entire card reader uses low power components, which can be used as a network terminal, and the battery is reliably jobs. The setting of the RC522, the conflict, and the communication interface setting is the focus. Different RF card protocols, the conflict process is different, and the communication interface will also have differences, but the relevant settings of the RC522 can make the physical interface meet the protocol requirements. For anti-conflict processing, the RC522 {supports the processing method based on bit conflict detection, and does not process an Aloha slot mode similar to 144.13b.
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