"1. Introduction
Ads58h40 is a high-performance high-speed analog-to-digital converter with four channels, 11 / 14 bits, sampling 250msps and receiving 90mhz bandwidth launched by Texas Instruments (TI). It has both burst mode with 125MHz bandwidth for feedback and snrboost mode with 90mhz bandwidth for reception, which is suitable for the feedback and reception channels of base station transceiver.
At present, most high-speed analog-to-digital converters (ADCs) used in base station transceivers have DC offset correction function. It is used to correct the DC received by the ADC so as not to degrade the performance of the receiver. However, this function will also cause code toggle of ADC. If the PCB layout is improper, it will cause inaccurate acquisition of small signal power by ADC. Taking ads58h40 as an example, this paper analyzes the problems caused by code domain flip interference, and provides a PCB optimization solution.
2. Function and influence of DC offset correction function of high speed ADC
DC offset is formed by the DC superposition of the external DC signal component and the original signal. In the base transceiver, it is mainly caused by the local oscillator leakage and the nonlinearity of mixer or IQ demodulator. DC offset will interfere with useful signals, which usually needs to be suppressed by DC offset correction function of ADC.
In terms of code domain, for an ideal 11 bit ADC, the inter code should be 2 ^ (11-1) = 1024. Expressed by binary complement, it is 0x000. Since the highest bit of the binary complement represents the symbol bit, the corresponding 11 bit data range is from 0x000 to 0x7ff. 0x7ff indicates - 1, corresponding to 1023. When there is no useful signal input, ideally, the signal collected by 11 bit ADC should be 0x000 in the code domain. But in fact, thermal noise and DC offset will be collected by ADC. The DC offset in the code domain will make the code obtained by ADC air mining offset upward relative to 0x000, and the natural fluctuation of thermal noise signal will also be superimposed on the code represented by DC offset. DC offset correction function of ADC corrects the code field error caused by DC offset and corrects it to 0x000.
The workflow of DC offset correction function of ADC is as follows:
The following two diagrams are used to illustrate the difference in code domain between ADC not enabled and enabling DC offset correction function.
When the DC offset correction function of ADC is not used, the thermal noise and DC offset obtained by 11 bit ADC goaf mining are shown in the code domain as follows:
When using the DC offset correction function of ADC, the thermal noise and DC offset obtained by 11 bit ADC goaf mining are shown in the code domain as follows:
Through comparison, it is found that after enabling the DC offset correction function of ADC, the code domain error caused by DC offset is corrected, and the thermal noise fluctuates around the DC offset from basically above 0x000 code to 0x000 code in the code domain. Therefore, when the DC offset correction function is enabled, the natural fluctuation of thermal noise will cause the random reversal of code domain from 0x000 to 0x7ff. Reflected in the 11 bit data line of ADC, that is, during ADC air mining, the levels of all data lines are switched between logic 0 and logic 1 at the same time. At this time, the external interference of the data line is the largest. If the PCB layout is not careful enough, the interference signal will be coupled to the analog input of the ADC. Although the amplitude of this coupled interference signal is not large, it will form wave interference to the input signal of ADC, especially the small input signal in the frequency domain, which is reflected as ripple noise floor in ADC empty mining.
3. Problems caused by code domain inversion interference
Take ads58h40 as an example to illustrate the consequences of code domain inversion interference signal coupling to ADC analog input.
When the PCB layout is not ideal, as shown in the figure above, the output data end is directly or indirectly coupled to the analog input end of the ADC through the clock or the VCM of the ADC.
Affected by this interference signal, the frequency domain diagram obtained by FFT transformation of the data obtained from ads58h40 channel air mining is as follows:
It can be clearly seen from the figure that the ADC collects the wave bottom noise, which slightly worsens the signal-to-noise ratio (SNR) of the ADC, and will lead to inaccurate amplitude measurement of small signal and affect the sensitivity test of the receiver.
In order to further illustrate the influence of code domain inversion interference. Input signals with different amplitudes to ads58h40 for frequency sweep test, and draw the collected data as follows:
The sampling clock of ads58h40 is 245.76mhz. For the central 60m range of its second Nyquist domain, five power levels are used for frequency sweeping. When the power is greater than - 40dbfs, the code domain inversion interference introduced due to improper PCB layout has little impact on the input signal (due to the filter at the front end of ADC, the input signal is not completely flat). However, with the decrease of input signal power, the influence of this interference on the input signal becomes greater and greater. When the input signal amplitude is lower than - 60dbfs, the power error caused by removing the influence of analog input filter can still reach more than 3dB., Read the full text, technical section
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