H.264 As a new generation of video codec technology, H.264 is compared to traditional MPEG-2, which makes it possible to achieve higher image quality, which can achieve higher quality video transmission at smaller bandwidth, occupying in video data storage. Less storage space.
Traditional DVB-T market, MPEG-2 is the mainstream video codec format. In recent years, as the bandwidth and frequency resources are increasingly precious, operators in European emerging areas, Russia, Turkey, etc., have selected H.264 as a video codec format, forming a certain size market, causing the attention of set-top box manufacturers.
H.264 Decoding Chip FH8601, this ASIC chip is combined into a two-chip solution in combination with industry-mature DVB-T top box chips. The FH8601 may receive instructions from the main chip (such as LSI9700, NEC61123), and then send the image back to the main chip by the main chip after decoding the image, and the main chip is displayed by the main chip after decoding the image. This program has been selected by Russian DVB-T operation.
How to achieve a new generation of H.264 video decoding capabilities on a traditional DVB-T top-top box platform? What is the key technical problem that needs to solve when the engineer needs such a two-chip combination solution? This article will focus on H.264 decoding chip FH8601 as needed in the process of integrating with traditional platforms:
2. Realize the video and audio (A / V);
3. Coded stream compatibility in H.264;
Control interface and video I / O interface
As shown, in a set top box terminal, FH8601 is a coprocessor to implement video decoding. It provides interfaces with main chip communications and data transmission, the most basic localbus interface. As long as the main chip can provide an data address bus that access the RAM or NOR type flash, the control and video data transfer of the FH8601 can be implemented. How the main chip gets the FH8601 decoded video data is also a problem that the system engineer needs to consider, and FH8601 provides a standard ITU601 / 656 video output interface.
figure 1
The host interface Localbus: FH8601 chip can be configured with the host through 16-bit or 8-bit data width, 8-bit or 16-bit width configurable. The operation of the host on FH8601 mainly includes reset, configuration, download firmware, write code stream data, and query status.
Video data output interface: Video data is fully compatible with ITU601 / 656 standard, and hosts must be able to provide the corresponding video input interface. The synchronous clock of the video output interface can have a selection of 0 degrees and 180 degrees phase.
Audio and video synchronization
Synchronization of audio and video is a problem with audio and video application engineers of all developer top box programs. Engineers often spend more energy to get the best audio and video effects in this technical point. From the actual effect of FH8601-implemented program, its audio and video synchronization is very good.
1. MPEG specification to implement audio and video synchronization
The MPEG specification provides an appropriate tool for absolute guarantees of audio and video (A / V). Each audio and video frame have a display timestamp (PTS) that allows the decoder to reconstruct sound and images. These PTS values are given by multiplexers in the MPEG encoder. The decoder receives audio and video data before these PTS, so it can be used to play video and audio synchronously. In the MPEG system, since the bit slot, the road slot, the frame, the frame time slot, and the frames are strictly time related due to the time division multiplexing, which is synchronization. In order to recover the program, first decode the ES. The sound, the reproduction of the image signal needs to be synchronized, which requires the data stream to be transmitted to be synchronized.
2. Synchronization mechanism provided by FH8601
The FH8601 has an automatic audio video synchronization. This feature simplifies the complexity of the system software. Specifically, the main chip needs to open the synchronization function in the FH8601. During the decoding process, the main chip needs to write the current PTS of the audio to the FH8601 so that the FH8601 automatically performs synchronization of video audio. Video PTS is written to FH8601 with the code stream data.
Coded stream compatibility and upgradeability
Although the H.264 standard has been determined in 2003, it is still in the early stage of the application. The encoder is not mature as MPEG2, so the decoder must face the code code stream is not standard and regularly upgraded. The FH8601 will take into account these problems during the definition of chip implementation. Through firmware, we realize those parts of the flexible change in the standard. All changes in the firmware do not require the participation of the design engineers, but only simply replace the original firmware and download it online.
Code stream compatibility: The current FH8601 has achieved docking with all the mainstream encoders in addition to all ITU compatibility code stream tests.
Update the firmware: When you need to upgrade the firmware, you only need to provide a new firmware data file, and the user can replace the original file to recompile to easily complete the upgrade.
System software design
For emerging solutions such as DVB-T / H.264, engineers who don't want to give up the original software resources and code accumulation will think of software multiplexing. Obviously, for the design company that has already had a DVB-T top box program, a two-chip program gives a most direct convenience of the system engineer, that is, all system resources can be placed directly in the new project. In the next, we also need to consider multiplexing the original software resources. In fact, in the case where the host does not change, the original software and code will not have any waste, unless you think that they have been outdated. We only need to perform a small number of driver transplants and the interface function call test work according to the newly added H.264 decoding function.
Comparison of different programs
Market risk: From a technical point of view, the two-chip scheme composed of FH8601 and mature DVB-T chip is compared with other single-chip SOC SOC schemes that support H.264, there are research and development, development cycle, scheme maturity. Obvious advantages, greatly reduce the risk of products into the market.
Price advantage: At the same time, from price considerations, due to large quantity shipments have been large, the market price is very low, plus a low-cost H.264 decoder FH8601, its set top box terminal BOM price However, a BOM price based on the other SOC single-chip-based terminal is 30% to 50%.
Development inheritance: In response to the current market SOC SOC program, design the company when choosing such a program, basically abandoned the accumulation of the original software resources, using a new software architecture and middleware resources, software developers need to start a The study of the platform will cause the entire code development cycle, and the test task is also aggravated. The wait for the market is equally a long process.
We describe the characteristics of the video part from the single-chip SOC program, you can see that they have a wide standard for video support, representing several standard H.264, VC-1, etc., which may occur in the future, this is giving the set top box At the same time, the function is increased, and the terminal cost is increased, and the two-chip plan using FH8601 is specifically designed for the H.264 standard clearance decoding market, and the current market needs. Read more
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