"This paper details the causes of electromagnetic interference generation of integrated circuits in this paper, and combined with the process characteristics of the mixed integrated circuit, the specific measures should be paid attention to in the system electromagnetic compatibility design, and the specific measures taken to improve the electromagnetic compatibility of the mixed integrated circuit is laid. Base.
1 Introduction
Hybrid Integrated Circuit is an integrated circuit made of a semiconductor integrated process with a thickness (thin) film process. The mixed integrated circuit is to produce a thick film or a thin film element and the interconnection thereof on the substrate, and the discrete semiconductor chip, a single-chip integrated circuit or micro element is mixed on the same substrate, and then packaged. It has the characteristics of high assembly density, high reliability, good electrical properties.
As the size of the circuit board is small, the wiring density is increased and the operational frequency is increasing, the electromagnetic interference in the circuit is increasingly prominent, and the electromagnetic compatibility problem is also the key to the normal operation of an electronic system. The electromagnetic compatibility design of the board is the key to system design.
2 electromagnetic compatibility principle
Electromagnetic compatibility refers to the ability of electronic devices and power to work properly in a certain electromagnetic interference environment, and is also an electronic device and power supply to generate electromagnetic interference and avoid the ability to interfere with other electronic devices.
Any electromagnetic interference must have three basic conditions: first there is an interference source, which is a device or device that produces a harmful electromagnetic field; second is to have a pathway to propagate interference, usually considered two ways: conductive coupling mode and radiation The coupling method, the third is to have sensitive devices that are susceptible to interference.
Therefore, solving electromagnetic compatibility problems should be aimed at electromagnetic interference, and add-on: reduce interference intensity of interference generating elements; cut off interference pathway; reduce the sensitivity of system on interference.
Electromagnetic interference present in the mixed integrated circuit design is: conductive interference, crucible interference, and radiation interference.
When solving the EMI problem, first determine the coupling pathway of the emit source is conducted, radiated, or string. If a high-amplified transient current or fast rising voltage occurs near the conductor containing the signal, the problem of electromagnetic interference is mainly a string. If there is a complete circuit connection between the interference source and the sensitive device, it is conducted interference. Radiation interference is generated between the parallel wires of the two transmission high frequency signals.
3 electromagnetic compatibility design
When the integrated circuit electromagnetic compatibility is designed to first make a functional test, check whether the electromagnetic compatibility index can meet the requirements in the scheme has been determined, if you do not meet, you need to modify the parameters to achieve an indicator, such as transmit power, operating frequency , Reselect the device, etc. Secondly, protective design, including filtering, shielding, grounding and lap design. The third is to do the adjustment design of the layout, including the inspection of the overall layout, the layout inspection of components and wires. Typically, the electromagnetic compatibility design of the circuit includes: the selection of processes and components, the arrangement of circuit layout and wires.
3.1 Selection of processes and components
The mixed integrated circuit has three manufacturing processes to be available, a single layer film, a multilayer thick film, and a multilayer coefficient film. The thin film process can produce a small size, low power, and high-current density required for high-density mixing circuits, with high quality, stable, reliable and flexible characteristics, suitable for high-speed high-frequency and high packaging density. But only single layer wiring is high and cost.
The multilayer thick film process can produce a multilayer interconnect circuit at a lower cost. From the perspective of electromagnetic compatibility, the multilayer wiring can reduce the electromagnetic radiation of the circuit board and improve the anti-interference ability of the wiring board. Since a special power layer and formation can be set, the distance between the signal and the ground wire is only the interlayer distance. Thus, the loop area of all signals on the board can be reduced to effectively reduce the difference model radiation.
Among them, the multilayer co-burner process has more advantages, and is currently passive integrated mainstream technology. It can achieve more layers, easy toburize components, improve assembly density, and have good high frequency characteristics and high-speed transmission characteristics. In addition, with the film technology has good compatibility, the two combine a mixed multilayer circuit that enables higher assembly density and better performance.
Active devices in the hybrid circuit typically use bare chips. When there is no naked chip, the corresponding packaged chip can be used, and the table chip is tested as much as possible. When choosing a chip, try to select a low speed clock as much as possible when meeting the product technical indicator. In the case of HC, it is never used by AC, and the CMOS4000 can do not use HC. The capacitor should have a low equivalent series resistance, which avoids large attenuation of the signal.
The encapsulation of the mixing circuit can be used with a curable base and a shell cover, and the parallel seam welding has a good shield.
3.2 Layout of the circuit
When the layout of mixed microcircuits is divided, the three main factors should be considered: the number of inputs / output pins, the density and power consumption. A practical rule is 20% of the sheet member as a substrate, and the dissipation power per square inch is not more than 2W.
In terms of device arrangement, in principle, mutually close to each other, separate the digital circuit, analog circuit, and the power supply circuit, separate the high frequency circuit from the low frequency circuit. Device, small current circuits, large current circuits such as noise should be allowed to remotely travel from logic circuits. Main interference and radiation sources such as clock circuits and high frequency circuits should be arranged separately from sensitive circuits. The input / output chip is located at the I / O exit close to the mixed circuit package.
High-frequency components can shorten the connection as much as possible to reduce distribution parameters and electromagnetic interference between each other, and are susceptible to interference components to be too close to each other. The input output is as far away. The oscillator is as close as possible to the location of the clock chip, and remotely away from the signal interface and the low level signal chip.
The components are parallel or perpendicular to the side of the substrate, which is parallel as much as possible, which not only reduces the distribution parameters between components, but also conforms to the manufacturing process of the hybrid circuit, easy to produce.
The lead pads of the power supply and ground on the hybrid circuit substrate should be arranged, and the I / O connections that are uniformly distributed and grounded. The bare chip's mount area is connected to a negative potential plane.
When the multilayer mixing circuit is selected, the interlayer arrangement of the circuit board changes with the specific circuitry, but generally has the following features.
(1) The wiring layer should be arranged adjacent to the power supply or ground plane to produce flux to the elimination.
(2) The power supply and the formation are allocated in the inner layer, which can be considered as a shield, which can better suppress common mode RF interference on the board and reduce the distribution impedance of the high frequency power supply.
(3) The internal power supply plane and the ground plane are as close as possible to each other, and the general plane is in the power supply plane, which can utilize an inter-layer capacitor as a smooth capacitor of the power source, and the ground plane is simultaneously connected to the radiation current of the power supply plane to shield.
3.3 Wire layout
In circuit design, it is often only focused on improving the wiring density, or pursuing uniform layout, neglecting the effect of line layout on preventing interference, making a large number of signal radiation to space to form interference, may result in more electromagnetic compatibility problems. Therefore, good wiring is the key to determining the success of the design.
3.3.1 Layout of the ground
The ground wire is not only the potential reference point of the circuit, but also as a low-resistance to the signal. The more common interference on the ground wire is the ground interference caused by the ground circle current. Solving this type of interference problem is equal to solving most of the electromagnetic compatibility problems.
The noise on the ground wire mainly affects the ground level of the digital circuit, and when the digital circuit is low, the noise of the ground wire is more sensitive. Interference on the ground wire may not only cause malfunction of the circuit, but also cause conveying and radiation emission. Therefore, the focus of reducing these disturbances is to reduce the impedance of the ground wire (for digital circuitry, reducing ground inductance).
The layout of the ground wire should pay attention to the following points:
(When there is a plurality of chips on the 1 plate, there will be a large potential difference on the ground wire, and the ground should be designed into a closed loop, and the noise tolerance of the circuit should be improved.
(2) Simultaneous board, simulated ground and digitally of the simulation and digital function are usually separated, only connected at the power supply.
(3) Set the ground wire according to different supply voltages, digital circuits and analog circuits.
(4) The public ground wire is as good as possible. When using a multilayer thick film process, a ground surface can be set, which helps to reduce the loop area while also reduces the efficiency of accepting antenna. And the shield of the signal line can be used.
(5) Avoid combing, this structure makes the signal return loop, increase radiation and sensitivity, and the common impedance between the chips may also cause erroneous operation of the circuit.
3.3.2 Layout of the power cord
In general, electromagnetic interference caused by power cord is common in addition to interference caused by electromagnetic radiation. Therefore, the layout of the power cord is also important, and the following rules should usually be observed.
(1) Decoupling between the power pins and the ground pins of the chip should be decoupled. The decoupling capacitor uses 0.01uF slice capacitors, should be installed near the chip, so that the loop area of the decoupling capacitor is as low as possible.
(2) When selecting a patch chip, try to use the power pin and the ground pin to close the chip, and further reduce the power supply circuit area of the decoupling capacitor, which is advantageous for realizing electromagnetic compatibility.
(3) The power line is as close as possible to the ground line to reduce the area of the power supply loop, and the differential model is small, which helps reduce the cross-interference. Different power supply loops do not overlap each other.
(4) When using a multilayer process, analog power supply and digital power supply are separated to avoid mutual interference. Do not overlap the digital power supply with analog power supply, otherwise the coupling capacitor is generated, and the separation is destroyed.
(5) When the power supply plane and the ground plane can be used in complete medium isolation, the frequency and speed is high, the medium slurry of the low dielectric constant should be selected. The power supply plane should be close to the ground plane, and arranged under the ground plane, the radiation current of the power supply plane is shielded.
3.3.3 Layout of the signal line
When using a single layer film process, a simple applicable method is first fabric, and then critical signals such as high-speed clock signals, or sensitive circuits are arranged close to their ground loop to other circuit wirings. The arrangement of the signal line is arranged in sequence according to the flow direction of the signal, so that the signal on the circuit board is smooth.
If you want to reduce EMI, let the signal line as much as possible to the backflow signal line composed, so that radiation interference is avoided. The low level signal channel cannot be close to the high level signal channel and the no filtering power cord, and the noise sensitive wiring is not parallel to the high current, high-speed switch line.
If possible, all key traces are arranged into strip lines. Incompatable signal line (digital and simulation, high speed and low speed, high current and small current, high voltage and low voltage, etc.) should be away from each other, do not parallel. The crosstalk between the signals is extremely sensitive to the length and line spacing of adjacent parallel traces, so try to make the high-speed signal line from other parallel signal line spacing and narrow the length of the parallel length.
The inductance of the conduction is proportional to its length and length of the length and the pair of the width of its width. Therefore, the conduction belt should be as short as possible, and the respective address lines or data lines of the same element may be as long as possible. As the wire input and output, the wire input and output is avoided, and the ground line is applied between the ground, and the crosstalk can be effectively suppressed. The wiring density of the low speed signal can be relatively large, and the wiring density of the high speed signal should be as small as possible.
In the multilayer thick film process, it should be noted in addition to compliance with the single-layer wiring.
Try to design a separate ground, the signal layer is arranged adjacent to the formation. When you can't use, you must set up a floor in a high-frequency or sensitive circuit. The direction of signal lines distributed on different layers should be perpendicular to each other, which can reduce the electric field and magnetic field coupling interference between the lines; the signal lines on the same layer maintain a certain spacing, and isolate the line signal crosstalk with respective ground lines.
Each high speed signal line is limited to the same layer. The signal line should not be too close to the edge of the substrate, otherwise the feature impedance change is caused, and the edge field is easily generated, and the outward radiation is increased.
3.3.4 Layout of the clock line
The clock circuit plays an important role in the digital circuit, and it is the main major in electromagnetic radiation. A spectrum with a clock signal radiant energy having 2 ns rising edges can be 160 MHz. Therefore, the design of the clock circuit is to ensure the key to the entire circuit electromagnetic compatibility. About the layout of the clock circuit, have the following considerations:
(1) All connecting transistor input / output devices are short as possible to reduce noise interference and distributed capacitance on crystal.
(2) The crystal capacitance ground should be used to connect to the device as wide as possible to the device; the crystallized digital ground pin should minimize the overhead.
(3) Do not use a daisy chain structure to transfer the clock signal, but a star structure should be used, that is, all clock loads are directly connected to the clock power driver.
4 Conclusion
Article innovation point: From the improvement of system electromagnetic compatibility, combined with the process of mixing integrated circuits, the specific measures to pay attention to in the design of mixed integrated circuit are proposed.
Source: Wiku Electronic Market Network
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