[From zero start into the FPGA] Matrix keyboard state machine control based on PLD

Key words: FPGA, PLD We talked independent key detection, of course, the FPGA application should talk of matrix keyboard. This thinking has been in the FPGA circuit and different, here, in this detailed explanation, Bingo with mature code of their own design as a case, I hope useful to you. A, FPGA circuit diagram of a matrix keyboard Circuit in the FPGA, microcontrollers and similar, as follows: Be In the default power, L [3: 0] = 4''b1, because the pull 3.3V, and the default H. [3: 0] is low; once a certain key is pressed , is the path that is flowing to the key H, L is the current undetectable. Thus by controlling the output of each row H, to which a retrieval key is pressed, and this is the principle microcontroller same, but not the same as written nothing. Two, FPGA matrix keyboard FSM 1. Code Code shown below, using a three-state machine described matrix keyboard. This module is a button on the form and jitter elimination identical, portable convenience. / ************************************************* * Module Name: matrix_key_design.v * Engineer: Crazy Bingo * Target Device: EP2C8Q208C8 * Tool versions: Quartus II 11.0 * Create Date: 2011-6-26 * Revision: v1.0 * DescripTIon: ************************************************** / module matrix_key_design ( input clk, input rst_n, input [3: 0] col_data, output reg [3: 0] row_data, output key_flag, // the mark of key is pressed output reg [3: 0] key_value ); // generate for 2ms signal reg [19: 0] cnt; // fffff, ≈50Hz 20ms always @ (posedge clk or negedge rst_n) begin if (! rst_n) cnt --- 0 ---- 1 ---- 2 ---- 3 * | | | | * R2 .1882 .--- 4 ---- 5 ---- 6 ---- 7 * | | | | * R1 .1882 .--- 8 ---- 9 ---- A ---- B * | | | | * R0 .1882 .--- C ---- D ---- E ---- F * | | | | * C3 C2 C1 C0 ************************************************** *** / parameter SCAN_IDLE = 3'b000; parameter SCAN_JITTER = 3'b001; parameter SCAN_COL0 = 3'b011; parameter SCAN_COL1 = 3'b010; parameter SCAN_COL2 = 3'b110; parameter SCAN_COL3 = 3'b100; parameter SCAN_READ = 3'b101; parameter SCAN_JTTTER2 = 3'b111; reg [2: 0] current_state; reg [2: 0] next_state; always @ (posedge clk or negedge rst_n) begin if (! rst_n) current_state (2) module can be divided into several states about:, Read more

Our other product:

Professional lightning protection system for Tower	Professional FM Radio Station Equipment Package	FMUSER FU-1000C 1000W FM Transmitter With USB Audio Input Interface
FMUSER 200W FM Radio Broadcasting Package	Hotel IPTV Solution	FMUSER FSN-1000T V5.0 1KW FM Radio Broadcast Transmitter