The power measurement of the electronic device is usually referred to as the measurement of the switching power supply (of course, there is a linear power supply). The information on the switching power supply is very much. The content discussed in this article is a PWM switching power supply, and is merely a summary of test experience. For example, it is easy to cause system failure. Therefore, before reading this article, you have already assumed a certain understanding of the switching power supply.
Switching power supply
Switching Mode Power Supply, often simplifies SMPS), is a high frequency power conversion device. It functions is to convert the voltage through different forms of architecture into a voltage or current that the user needs. The topology of the switching power supply refers to the form of the switching power supply circuit. It is generally not electrically isolated from the input ground wire and the input ground wire is divided into isolation and non-discover converters. Non-quarantine is in communication with the output, no isolation measures, most of the common DC / DC converters are this type. The so-called isolation means that the input terminal and the output are not directly Unicom on the circuit, and the input and output terminals are fully electrically isolated between the electromagnetic conversion mode. For switching converters, there are only three basic topology forms, namely, Buck (buck), boost, BUCK-BOOST (lifting down pressure), is determined by inductive connection. If the inductance is placed on the output, it is a Buck topology; the inductor is placed on the input, the BOOST topology. When the inductor is connected to the ground, it is a Buck-Boost topology.
Key parameter testing that is easy to trigger system failure
The following test items refer to the result of the test in the case of static load, only the noise (Noise) test needs to be used.
Phase point's Jitter
For a typical PWM switching power supply, if the Phase point Jitter is too large, the system is usually unstable (related to the phase margin mentioned later), and the typical Jitter value should be below 1 ns for the 200 ~ 500K PWM switching power supply.
Phase point collapse
Sometimes engineers measure the waveform below, which is a typical inductance saturation. For engineers who are not rich enough, it is often ignored. Inductance saturation will make the inductance value decline, similar to a short circuit, which will cause a dramatic increase in current, and MOS tubes often burn due to the sharp increase of temperature. At this time, it is necessary to replace a larger inductance of saturation current.
Shoot THROUGH test
The purpose of the test is to see the MOS tube is turned on, and there is a way to open the tube while causing the power to direct the short circuit. As shown in Figure 3, the blue curve (VGS_LMOS) is the tube while the tube is turned on, and is brought, if the blue curve is taken, the peak exceeds the MOS tube Vth requirements, while duration (Duration ) Also exceeds the DataSheet requirements, thereby there is a risk of turning on. Of course, this is the most common situation.
Below this situation, there are very many people to ignore, even some experienced power test engineers. The following group diagram 4 is the tube opening, the waveform at the time of the closing (Figure 4-1 is a schematic, Figure 4-2 shows the actual test chart). Although there is no situation that is brought up, please pay attention to the phenomenon of crossover, and the level of the intersection is higher than the Vth value specified by the MOS, which is a serious shoot.
THROUGH phenomenon. The most direct consequence is MOS tube burning!
Phase marks and bandwidth is a project that many companies have not tested (especially smaller companies are limited by instruments), but this is a very important test project. Whether the power supply system is stable, whether it can work for a long time (3 years or more), the phase margin and bandwidth can have a large extent of the decisive role. Many companies have completely dependent on the recommended value in the reference design of the power chip manufacturer, but with your design tends to have little difference, this will have a lot of potential risks.
If the system is an unstable system, it is reflected in some power test items, it will see the following major issues.
● The supply of the power supply is passed, but the power is still unstable. The performance is functional test Fail. Often some engineers say that my power Noise is already very small, add a lot of capacitance, why is it still running? In fact, his closed-loop system is unstable.
● Phase point Jitter is too big. This is a relatively typical instability.
● Transient response is too big. The most stupid approach is to add a lot of capacitors to meet the requirements of transient response. This is money for low-cost products.
If you don't use the correct way to test the Pottermap of the system's loop gain, how do you start to debug these projects let him test? Only come back and return to the experiment. Then come back and return to the running function test. Oh, my god, a vast workload. Moreover, for some low-cost products, low-cost schemes such as aluminum electrolytic capacitors, MLCC capacitors (inductance, and resistance values are substantially no variation). The value of these capacitors is reduced over time. Such as MLCC, the system is running in normal temperature for two years to three years, and the value of the value will become half of the original. And this change in capacitance will have a great impact on the stability of the system, which is also an important reason why many low-priced product quality is unreliable. That is, the higher the price, the better the capacitance, of course, not. This is why you want to test the reason for Phase Margin. You need to debug a set of values that can override the full capacitance and semi-capacitance requirements. This can also achieve low price high quality.
According to Nyquist qualification requirements for system stability, standardization requires a closed-loop system to be at least 60 degrees, 45 to 60 degrees can consider the minimum quota requirements. For bandwidth, the requirements of the switching power supply of 200 to 500K are 10% to 30% switching frequency. The lower the bandwidth from the stability of the switching power supply, the easier power supply is stable. From the dynamic indicators of the switching power supply, the more dynamic performance of the boom, the better the power supply.
The figure below is a typical Pottermap:
Another point is that in addition to the PWM switching power supply, there are many linear power supplies (LDOs) that compensate for the network outside the chip, but also to do a similar loop gain of the Potter chart test, thereby ensuring its stability. LDO testing is that most manufacturers are easily ignored. For example, as shown in Figure 6 shows such a circuit, many people will directly measure noise.
The phase margin we may see cannot meet the requirements. As shown in Figure 7, only 30 degrees. At this time, only the different parameters can be debugged to get a better result. To meet the requirements of system stability.
Power ripple (RIPPLE) and noise (Noise)
Power ripple and noise seem to be the easiest project in the power test. But it is also possible to have a relatively large impact on your test results and functions. The first is the ripple, when we test, just see if it meets the requirements, such as 30mv, etc. Sometimes, ripple and system PLL is related. If your PLL JITTER is not, you can consider further reduction of Ripple. Noise, someone will ask, why my system Noise and his system Noise are basically a range, but my system will run FAIL? First we have to exclude the cause of the system's stability, then, do you have to use the oscilloscope to do FFT, look at the difference between the same NOISE in the frequency domain?
Article source: Electronic enthusiast
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