"Typical medical non-invasive ECG reflects the health of the heart in basic visual forms for clinical analysis and medical intervention. However, heart activity has some details (such as" late potential ") requires extremely high resolution ECG electronic equipment. The spatial resolution required for this image may be affected by the factors of the noise of the ECG (ECG) detector and the detector system and other inhibitory performance, even subject to the impact of the acquisition technology.
The designer can avoid many problems by effectively using the low noise drive and high resolution analog-to-digital converter (ADC), and the designers can develop high-precision ECG systems.
This paper first briefly explains the working principle of ECG, and then discusses the problem related to the use of drive amplifiers and high resolution ADCs in this application. This article also introduces an example combination that includes analog DEVICES ADA4945-1ACPZ-R7 High Speed Full Differential ADC Drivers and Analog Devices Eight-channel 24-bit AD7768BSTZ ADCs, and explains how to configure external resistors and capacitors to achieve optimal performance.
ECG system
ECG is a non-invasive detection that reflects potential heart conditions by collecting millivolt (MV) stage electrical signals generated by the heart. The ECG signal can be detected in many parts of the body, but decades of medical traditions have standardized the recognized part to the fictional shape formed by three limbs, called the EINTHOVEN triangle (Figure 1).
Figure 1: The ECG signal can be detected in many parts of the body, but the Einthoven triangle defines a recognized part. (Source: Digi-Key Electronics)
This triangle describes the position of the electrode RA (right arm), LA (left arm), and LL (left leg). They also form VI, VII, and VIII values.
The data generated by this system allows the doctor to understand the heartbeat rate and the rms mechanism. However, if further research on the data, it is possible to find evidence that the heart thickness increases (fat) and whether the myocardium is damaged. In addition, simple two-dimensional ECG maps can reflect whether blood flow flowing into myocardium is seriously hindered, or whether there is any abnormal electrical activity pattern that causes patients with arrhythmia.
Figure 2 shows the ECG signal of the normal heart, highlighting the normal combination of three graphic deflection on a typical electrocardiogram called QRS wave groups.
Figure 2: Q, R, and S point generate QRS wave groups, typically the central and visually obvious part of the ECG trace. (Source: Digi-Key Electronics)
The QRS wave group is the center and obvious part of the signal. This signal corresponds to the decimination of the left and right ventricle of the human heart. In adults, the QRS wave group usually lasts 0.08 to 0.10 seconds. The QRS wave group duration is considered not normal than 0.12 seconds. The measurement challenge of the ECG system is to capture the QRS signal reliably and completely.
This challenge is not very difficult. In theory, the Sampling rate of the ECG device is at least 50 Hz. The actual ECG's sampling frequency exceeds 500 Hz, and the typical conversion speed of the internal converter of the ECG detector is ≥1 kHz. For this sampling rate, the resolution required for the internal converter in the system of the typical ECG detection system is 12 bits.
These resolutions and speed specifications are consistent with the General ECG detector. However, some cardiac abnormalities can only be detected by higher resolution ECG detectors. For example, a patient with a persistent intermediate tachycardia (Vt), which may have a low high frequency waveform that lasts tens of milliseconds in the late QRS wave group. This "late potential" in the ECG results are considered to be caused by early decimalization of cells in the right ventricle (Fig. 3).
Figure 3: The late potential in the ECG results occurs during the QRS wave group, but usually too small and cannot be displayed on a typical ECG detector. (Source: Digi-Key Electronics)
The late potential amplitude is usually too small and cannot be displayed on normal ECG. However, if a 20-bit high resolution system is used, the ADC can make the QRS wave group record internally to filter out random noise, so it can see the late potential in the ECG image.
When the non-invasive high resolution ECG can detect a heart at night, its clinical significance is very significant. For example, for patients with acute myocardial infarction (MI), late potential detection has important prognostic significance. The ventricular lunk potential of such patients is a dangerous sign of secondary infarction or sudden cardiac death. Earlier, this classification and subsequent diagnosis can only be carried out by invasive or minimally invasive techniques.
However, in order to enable the signal that cannot be detected, it can be seen using ECG, and the high-resolution triangular integral (σΔ) ADC and advanced signal acquisition and processing technology must be employed.
High resolution conversion system
Typical ECG systems have twelve electrodes to be fixed on the patient's skin, which can detect millivolts (divided by 1,000, ie micro (μV)) level cardiac signals. After each electrode signal reaches the signal to adjust the front end, the meter amplifier is enlarged to the microastvoltaic signal, which is prepared for the drive amplifier and the final high resolution σΔ ADC (Fig. 4).
Figure 4: ECG front-end signal adjustment block diagram for high resolution medical testing systems starting from three op amp amplifiers. (Source: Digi-Key Electronics)
The first device in the signal chain is a meter amplifier composed of three precision op amps, which may have a second gain stage. These devices are set up system grounding and differential gain for microvolt-class small signals. Drive amplifiers and low pass filters (LPFs) Get differentially amplified ECG signals to provide sufficient drive and filtering for high resolution σΔ ADC.
Drive amplifier and σΔ-ADC
One of the key points in the front-end signal adjustment block diagram is the relationship between the drive amplifier and σΔ ADC. ADA4945-1 All Difference ADC Drive Drive High Resolution AD7768-4 σδ ADC input (Figure 5).
Figure 5: Typical connection diagram of high resolution σΔ ADC AD7768-4, ADA4945-1 serving as a drive amplifier. (Source: Digi-Key Electronics, original information provided by Analog Devices)
The ADA4945-1 drive amplifier and R / C, the LPF network sends a signal to the input of σΔ ADC (AD7768-4).
AD7768-4 is a four-channel 24-bit synchronous sampling σΔ ADC. The AD7768-4 supports reconfiguration, providing power mode and digital filter selection to adapt to a wide range of applications, including ECG, industrial input / output modules, instrumentation, audio testing, control loops and status monitoring.
Measurement performance
The ADA4945-1 has two full-metronial power modes - full-power and low power patterns for optimizing the balance of system power consumption and performance. The full-power bandwidth of the ADA4945-1 is 145 megahertz (MHz), while the bandwidth in low power mode is 80 MHz. When using a 5 V power source, the input voltage noise at 100 kHz in full power mode is 1.8 nV / √Hz, and the low power mode is 3 NV / √Hz. Finally, the working static current of the ADA4945-1 in full power mode is 4 mA (MA, typical) and 4.2 mA (max). In low power mode, the static current is 1.4 mA (typ) and 1.6 mA (max).
When using a broadband digital filter, the AD7768-4 low power mode provides 32,000 sample / sec (KSPS) output data rate (ODR) and 12.8 kHz bandwidth. The difference between the 1 kHz sine wave signal and the full scale of the 1 kHz sine wave signal is -0.5 decibel (DB). The medium power mode provides a bandwidth of 128 KSPS ODR and 51.2 kHz when using a broadband filter. The difference between the 1 kHz sine wave signal and the full scale of the 1 kHz sine wave signal is -0.5 dB. When using a broadband filter, the fast power mode provides 256 kSPS ODR and 102.4 kHz bandwidth. Table 2 below shows the performance and power consumption of the ADA4945-1 and AD7768-4 power combinations.
The filter response has a cutoff frequency of 0.433 × ODR in response to the filter response of the AD7768-4. The passband ripple of ± 0.005 dB supports the relationship between the drive amplifier and the input frequency performance by frequency domain measurement.
In Figure 5, there is a resistance-capacitor (R / C) network between the amplifier output and the ADC input. The R / C network is used to perform various tasks. For example, C1 and C2 are ADC charge reservoirs to provide fast charging current for ADC's sampling capacitance.
In addition, these capacitors form a low pass filter with the RIN resistor to eliminate burrs associated with the input switch. When driving a larger capacitive load, the input resistance also contributes to the amplifier to stabilize and prevent the amplifier oscillation (Table 1).
Using the system in Fig. 5, the signal-to-noise ratio (SNR) generated by this evaluation device is 106.7 dB, the total harmonic distortion (THD) is -114.8 dB, the subsystem is low to 18.4 5 mW (MW) (Table 2 ). Table 1: The appropriate value of RIN, C1 and C2. (Data Source: Analog Devices)
The SNR of the operational amplifier / ADC combination indicates that the system resolution is: Table 2: ADA4945-1 ADA4945-1 Amplifier and the performance comparison of the three modes of the AD7768-4 ADC. (Data Source: Analog Devices)
Resolution = (SNR - 1.76) / 6.02
= 17.43 bit
This combination of high-resolution ADC drive amplifiers and σ-Δ ADC can produce precise outputs and completely no need to process.
To assess hardware, designers can use an EVAL-AD7768-4FMCZ assessment board with AD7768-4 and an amplifier clip card (AMC) with ADA4945-1 (Figure 6).
Figure 6: Adding a AMC with ADA4945-1 can be used to test the EVAL-AD7768-4FMCZ evaluation board for AD7768-4. (Source: Analog Devices, Digi-Key Electronics adds ADA4945-1 labeling
This assessment platform can be configured to use an AMC-ADA4500-2Armz clip card for the ADC drive as a drive amplifier input, which has only one channel. EVAL-SDP-CH1Z High Speed Design Evaluation Board Connect to the EVAL-AD7768-4FMCZ assessment platform to use the included assessment software. Precision audio source for communication analysis.
Summarize
High resolution ECG can detect a cardiac abnormality that does not pay attention to or requires invasive or minimally invasive detection procedures. However, the resolution required for this ECG may be affected by the factors of the noise of the ECG detector and the detector system and other inhibitory performance, even subject to the impact of the acquisition technology.
As described herein, designers can effectively combine Analog Devices ADA4945-1ACPZ-R7 high-speed all-in-ADC drivers combined with eight channel 24-bit AD7768BSTZ ADCs, thereby avoiding many problems and develops high-precision, high resolution ECG. This combination also provides a buffer / digital filtering circuit without post-processing devices.
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