"Introduction
At present, many enterprises use work cards to complete access control management, but also use the traditional manual method. It is not only easy to be mixed in, but also has no records, and there are all kinds of human errors. At the same time, there are some problems in the market door-to-door ban system, such as limited transmission distance and poor performance.
With the rapid development of embedded technology and the popularization of Ethernet technology, there are more and more embedded products based on Ethernet. This paper studies the access control system based on the combination of Ethernet data transmission and RF chip identification smart card. Compared with the traditional access control system, Ethernet solves the problem of transmission distance. Secondly, the RF chip pn532 based on 80C51 core is adopted to make the performance more stable. The basic principle of its work is to put the smart card on the access control system, and the system reads the data and transmits it to the main chip STM32 for processing. After processing, the main chip transmits the data from encn8j60 to the server through Ethernet protocol LwIP.
1. Hardware composition of access control system
The access control system is mainly composed of stm3h, the main control chip of Italian French semiconductor company, ENC28J60, the Ethernet controller of microchip company, and pn532, the RF chip of NXP company.
The structure of access control system is shown in Figure 1. The main chip STM32 transmits the data to ENC28J60 through the Ethernet protocol stack LwIP, and then can directly connect with the server through the network cable for communication, or connect to the server through the router. In terms of contactless card communication, STM32 is connected to pn532 through SPI interface with frequency of 1MHz.
1.1 STM32 peripheral circuit design
The system uses STM32F103, a 32-bit microprocessor of Yifa semiconductor company with Cortex-M3 as the core, as the main control chip. Its main frequency is 72 MHz, and its internal integrated storage space is 256K flash and 64K SRAM. It also includes I2C, SPI, I2S, USART, can, ADC, watchdog, etc. Cost performance is very outstanding in similar products. The hardware connection is shown in Figure 2.
During debugging, we use SWD to replace JTAG, because SWD not only has fewer pins, but also is more reliable in high-speed mode.
1.2 hardware circuit design of RF chip pn532
Pn532 is a highly integrated contactless read-write chip launched by NXP company. It contains 80C51 microcontroller core and integrates various active / passive contactless communication methods and protocols at 13.56 MHz. Support iso14443a / 14443b protocol. The working distance exceeds 75 mm. Receive the signal from the antenna and process the data according to the frame format specified in iso14443.
Pn532 supports three communication modes: SPI, I2C and HUS. Since we use SPI to communicate with the main control chip STM32, I0 and I1 are set to 0 and 1 respectively.
The peripheral circuit structure of pn532 is shown in Figure 3.
1.3 hardware design of Ethernet controller ENC28J60
The main control chip ENC28J60 is an independent Ethernet controller with industry standard serial peripheral interface (SPI). It can be used as an Ethernet interface for any controller equipped with SPI. ENC28J60 conforms to all specifications of IEEE802.3 and adopts a series of packet filtering mechanisms to restrict incoming packets. It also provides an internal DMA module to achieve fast data throughput and hardware supported IP checksum calculation. The communication with the main controller is realized through two interrupt pins and SPI, and the data transmission rate is up to 10 Mb / s.
Two dedicated pins are used to connect LEDs for network activity status indication.
It should be noted that when reading multiple data from ENC28J60, even if the data output by the main control chip STM32 is not required, a data should be written to the SPI transmission buffer before reading each data to start the interface clock of SPI.
The typical application circuit of ENC28J60 is shown in Figure 4.
2 system software design
2.1 Ethernet protocol LwIP
LwIP is a small open source TCP / IP protocol stack developed by the Swiss Academy of computer sciences. Because it only needs more than ten K ram and about 40K ROM to run, it is very suitable for embedded systems with insufficient hardware resources.
LwIP belongs to a relatively loose communication mechanism, which realizes the communication between the application layer and the underlying protocol by sharing memory. It provides three APIs: ① ram API, ② LwIP API and ③ BSD API.
The disadvantage of ram API is that the code is not easy to understand and the development is difficult. Its advantage is that compared with the other two methods, it occupies less resources, has higher efficiency and is more suitable for embedded use with relatively few resources. Therefore, we use ram API to write.
There are two protocols in TCP / IP Transport Layer: TCP and UDP. TCP provides reliable data transmission in IP environment, while UDP provides unreliable transmission. TCP is adopted because the correct transmission of data must be required in the access control system. Fig. 5 is a block diagram of TCP processing under LwIP.
Ram API puts the protocol stack and application in one process. This function is based on function callback technology. The following are some key configurations and codes of LwIP.
(1) LwIP configuration
In LwIP configuration file lwipopts. H, modify the following places.
Whether to use the operating system, we don't need it, so fill in 1:
#define NO_ SYS 1
Configure the size of the heap:
#define MEM_ SIZE
Configure the size of the pool
#define PBUF_ POOL_ SIZE
#define PBUF_ POOL_ BUFSIZE
The above three configurations occupy most of the memory of LwIP protocol stack and need to be modified to appropriate values according to their own needs.
(2) LwIP code
① Set the IP address, subnet mask and gateway respectively:
IP4_ ADDR(&ipaddr，192，168，2，28);
IP4_ ADDR(&netmask，255，255，255，0);
IP4_ ADDR(&gw，192，168，2，254);
② Initialize the underlying function, that is, configure the MAC address, initialize ENC28J60, configure the maximum output unit, etc
low_ level_ init(netif);
③ Connect to the remote host. When the connection is established, the fourth parameter conn will be called_ Back：
tcp_ connect(TCP_ pcb，&ipaddr，1026，Conn_ back);
④ Callback function called when new data is received:
tcp_ recv(TCP_ pcb.tcp_ recv_ callback);
(5) the callback function called after the server successfully receives the data:
tcp_ sent(TCP_ pcb，tcp_ sent_ callback);
⑥ Callback function to handle errors:
tcp_ err(pcb，CMD_ conn_ err);
⑦ Received data:
ethernetif_ input(&enc28j60);
Once the communication ends or abnormal conditions occur, be sure to use pbuf_ The free () function releases pbuf to avoid memory waste. It should also be noted that during the normal operation of the system, the timer function TCP_ Fasttmr() and TCP_ The slowtmr() function must be called regularly at regular intervals.
2.2 software architecture and design of access control system
The main flow of the access control system is shown in Figure 6. After each restart, first initialize the relevant registers, initialize each module, confirm that the server has been connected, and then enter the program main cycle.
First, monitor whether it is necessary to call the fast timer and slow timer inside LwIP. Then monitor whether the server is disconnected. If it is disconnected, reconnect the server. If it is not disconnected, detect whether there is a smart card. If so, receive the information in the card for processing and then send it to the server.
epilogue
This paper describes the hardware and software architecture of the access control system using STM32 as the main control chip, which has guiding significance for the use of the chip and Ethernet protocol involved in this paper, and can greatly reduce the cost. At the same time, the use of the access control system will be more stable and the transmission distance will be longer., Read the full text“
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