"The scope and concept of the embedded world are extremely wide, ranging from ASIC to MCU. ASIC is a technology with great potential and innovation. Although its design is very expensive and takes several years, it still does not affect its huge market potential. In contrast, the single chip microcomputer scheme is much cheaper and the time cost is short. It only takes a few months or even weeks. However, whether ASIC or MCU, they are limited by third-party chips. In terms of final products, they still have many similarities and similarities. They mainly use ARM CPU core, including standard communication interface. A large number of analog functions are integrated on-chip to support low-power work and fast wake-up.
Fig. 1 comparison diagram of embedded design SOC and MCU
In the middle of this comparison figure is the programmable platform. Its design does not occur at the silicon level, but it can provide great flexibility in function and can be integrated into one device. The most obvious examples of this type are FPGA and CPLD, which are powerful and have huge capacity. However, these devices can not be called programmable platforms, because they are concentrated in the digital field.
In order to build a real bridge between ASIC and MCU, a programmable platform is needed. This platform can provide the flexibility of analog and digital functions. It does not need the designer to be an expert in these two aspects. Designers want such a platform, add programmable functions to the standard MCU, and use their ready-made tools and systems. Then, the ideal system is such that it is completely suitable for an application. All required peripheral devices and interfaces are provided on the chip, with appropriate performance and no unnecessary functions to pay.
To achieve such flexibility, a platform is needed, which can support the implementation of customizable high-performance analog functions and programmable digital logic in SoC without requiring developers to become experts in HDL or analog design. The microcontroller has some tools and simulation functions, but it lacks configurability. FPGA has configurable logic and can also provide better software, but their disadvantages still lie in simulation and can not really operate at low power.
Arm is an embedded standard in practical application
For many years, arm architecture has been the de facto standard of ASIC design and dominates many high-end embedded markets. Intel has been committed to the use and promotion of personal computers (there is no problem of anti programming cloning). A few years ago, after the release of cortex M series processor core, it was difficult to find a modern MCU without arm core.
The authenticity of this statement can be seen from arm supporters all over the embedded industry. When talking to SOC IP suppliers about the first bus architecture used by their target new products, the result will always be arm's AMBA. When talking to real-time operating system (RTOS) companies (those that have not been purchased by semiconductor companies), they will tell you that supporting arm is the top priority of their new products.
In fact, any platform that wants to succeed in the programmable part must use ARM CPU. The result is continuous. Engineers are not afraid of change. However, they often waste time because of change. In SoC design, if you do not provide the same CPU structure, the same compiler, the same IDE and debugger, the same real-time operating system and the same intermediate software package, it is very difficult to attract engineers to switch to new design without their traditional platform. In short, the software rule is that no one wants to leave the original design. In addition to the real low-end products, they can complete specific embedded functions on 8-bit devices such as 8051. Any programmable platform other than ARM CPU will soon be classified into a few fields and become a non dominant architecture.
2 add analog function to programmable device
There are constant programmable device failures, of course, referring to analog functions. Although many platforms can integrate important analog functions, such as high-speed communication interface, the real difficulty is to solve the low-level circuit problem of integrated traditional off chip components. After all, the current implementation of the physical layer (PHY) of FPGA completely isolates the analog part from the designer, leaving only the standard digital interface, just like other IP modules.
The real analog challenge is to achieve common functions, such as analog-to-digital and digital to analog converters, amplifiers and voltage comparators. This is not only because analog circuit is a difficult design problem, but also because some difficulties are handed over to end users. For digital functions, for example, it can integrate the implementation into the design, route to the appropriate I / O, run static timing checks, and all the work in the plan. Of course, timing plays an important role in design, but timing is not the essence of IP integration, but the speed of device operation, the complexity of overall design and the utilization of devices, which will affect routing resources. However, for any analog design, even simple circuits are difficult to design. Configuration options, on-chip routing and external board design are difficult to be optimal.
For example, switched capacitor modules are important analog components because they can be configured in many ways, such as programmable gain amplifier (PGA), transimpedance amplifier (TIA), analog filter, and even mixer. However, they also pose problems for designers because their behavior depends on the configuration of the module and the switching frequency of the capacitor. It's good to put this function into a chip, but it's not easy to understand how to make it work from datasheet and a pile of configuration registers.
This problem can be solved by software. Putting high-performance simulation functions into a device is a solution. However, if there is no development tool to uncover the mystery of the configuration process, after the programmable device is initially selected, due to the need for rapid design to enter the market, it is likely to introduce many off-chip devices that were not planned at the beginning.
The method to solve these simulation problems is a software tool, which provides modules and parameters through devices including programmable simulation modules and implementation rules, so that designers do not need to know how to realize the functions. In other words, designers do not need to understand the working principle of the traditional ADC chip, nor do they need to learn the register name and bit field of the integrated device. They only need to establish an ADC. The designer does not need to get into the dilemma of calculating clock frequency and matching R and C values, but only needs to configure the ADC according to its characteristics and characteristics (such as resolution, maximum sampling rate, operating voltage range, etc.).
Once the ADC is determined in the design, the next step is to tailor it to the needs of the application. Ideally, this process is achieved by setting parameters. If an ADC supports a range or fixed setting value, it can be called the input range (the group voltage will not supply power to the ADC), then these choices should be intuitively reflected to realize the selection of ideal parameter values through one operation.
Figure 2 some tools, such as cypress's PSoC creator, can realize programmable analog circuit design by selecting the functions you need, without considering the implementation details
A typical example of this programmable platform tool is the PSoC creator of Cypress Semiconductor. PSoC creator supports PSoC 3 and PSoC 5 device design. It provides schematic design interface. Users can draw as needed and configure the selected device through user parameter editor. In the directory, users can pre create analog (and digital) devices, where you can see engineering examples and data manuals, just like off chip ADCs. When a device is used in the design, the tool will automatically generate the API interface. Users do not need to set registers or worry about the order or timing of ADC.
3 design of integrated analog-to-digital function with software development environment
It is very effective to use the schematic design of simulator to solve the problem of programmable simulation. It is not the whole solution. Developers also need a tool to support digital design and, more importantly, application software design.
In digital design, schematic design is nothing new. The platform that supports the integration of digital and analog circuit design into a single device is becoming more and more popular. However, using multiple tools to complete a design does not attract developers. Developers prefer to carry out digital and analog design in an editor, and create, debug and test the above design in the same environment.
Suppliers of programmable platforms need to remember that in the world of MCU, the designer's design is inseparable from the integrated development environment (IDE) of the software center. It needs to carry out source code editing, project management, tool compilation, and debug together under a single architecture. In the ASIC world, they are the same for application development. Chip designers and software developers are rarely a team. Neither group wants to discard their convenient IDE and add new tools to solve problems they didn't care about before. Both teams need a modern ide that looks and works like they have used before, and even more compelling features to prove that the IDE has changed.
Figure 3 shows an overvoltage timer circuit integrating an analog comparator and a digital counter
We illustrate these ideas with an overvoltage timer, which uses an analog comparator and a digital counter to monitor the input voltage. If the pin voltage exceeds the reference value, the comparator turns on the counter. After a specific period of time (of course, this time can be achieved by setting a parameter), an error signal is sent at the pin and the interrupt service program (ISR) is triggered. This simple example easily integrates digital and analog circuit design. Developers can design from the sketch. They only need to consider the work of MCU, that is, connecting pins, clocks, reference voltages and interrupts, so they can design functions that are difficult to achieve.
When the design is created, the development environment generates an API for the device. This allows developers to use these devices directly without understanding its implementation. For example, developers can change the timeout cycle of the counter or get its value through the API, turn off the interrupt, turn off the clock, etc. there is no need to study the reference manual or example code of the device. By building hardware from the schematic diagram, programmable devices provide incomparable advantages over fixed function chips, because the tool automatically provides all setting codes, making the design of interface to all on-chip functions a very simple process.
Figure 4 PSoC creator's work browser window shows the source files generated for comparators, counters, clocks and interrupt service programs
The generation of API is actually an extension of mapping hardware setting parameters to software abstract concepts. For example, to set up a clock, developers only need to put it into the design and set the required frequency. The development tool will be responsible for how to obtain the appropriate frequency within the tolerance range from the known clock source on or off chip. Starting and closing the clock only requires a simple call to the API, such as CTR_ cLOCk_ Start() or Ctr_ clock_ Stop（）。 There is no need to modify the register to select the clock source, set the frequency division, select it as the input of on-chip function, or turn it on / off through bit operation.
Development tools can generate APIs for system resources (such as clock, interrupt, DMA, or pin), which can save time. At the same time, on-chip analog, digital and communication peripheral APIs also make it easier to develop programmable devices than MCUs or ASIC. When the most popular embedded ARM core is used, compared with the comparison diagram seen at the beginning of the article, the integrated schematic design tool shows a strong advantage over the design at both ends of the comparison diagram. As the programmable chip gets better and better, the performance becomes stronger and stronger, the arm core becomes more and more powerful, the simulation function becomes stronger and stronger, and the cost becomes lower and lower. All these seem to show more and more clearly that the software supported by the platform will determine whether it will succeed in the market. Daily development tools are the key to unlock the potential of chips and expand the scope of design. Most importantly, they will win the love of embedded engineers, because they have been doing one thing: finding a better way to solve all problems.
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