Simulated Front End Circuit Design Based on OPA376

This article Let us talk to the ADAS in the short-range radar scheme in ADAS. Refer to the ADC unit part in the red frame below, which involves the ADC portion and the amplifier portion. Compared to general amplifiers, the precision amplifier has higher precision, so it is recommended here for precision operation amplifiers OPA376, which is a low noise, low IQ precision op amp. The OPA376 series represents a new generation of low noise operation amplifiers with E-TRIMTM, with excellent DC precision and AC performance. Rail-to-rail input and output, low offset (25μV, maximum), low noise (7.5 nV / √Hz), 950μA (max) static current and 5.5 MHz bandwidth make the part very attractive variety of precision and portable Application. In addition, the device has a relatively wide power supply range and excellent PSRR, so there is an attractive force for applications that do not need to be adjusted directly from the battery. OPA376 (single version) is encapsulated by Micro Size SC70-5, SOT-23-5 and SOIC-8. OPA2376 (dual channel) is encapsulated in DSBGA-8, VSSOP-8 and SOIC-8. OPA4376 (four channels) adopts TSSOP-14 package. All models of rated operating temperatures range from -40 ° C to + 125 ° C. Another major device is high-speed ADCS, such as: AFE5401-Q1 - four-channel integrated simulation front end for automobile radar ADC08DJ3200 - 8-bit dual channel 3.2GSPS or single channel 6.4GSPS RF Sampling Mode Digital Converter (ADC) ADC12DJ2700 - ADC12DJXX00 ADC12DJ3200 - ADC12DJXX00 Taking AFE5401-Q1 as an example, AFE5401-Q1 is an analog front end (AFE), mainly for the application of integration. This device includes four channels, each channel consisting of a low noise amplifier (LNA), a programmable equalizer (EQ), a programmable gain amplifier (PGA), and an anti-allealed filter, and the back high speed , 12-bit model converter (ADC) consists of 25 msps per channel speed. Each of the four differential input pairs is amplified by LNA, followed by a PGA between the adjustable gain ranges between 0 dB to 30 dB. For each channel, a anti-aliasing, low pass filter (LPF) is also integrated between the PGA and the ADC. Each LNA, PGA, and anti-overlapping filter output is differential output (limited to 2Vpp). Anti-aliasing filter drive sheets, 12 bits, 25 msps ADC. Four ADC outputs are multiplexed on a 12-bit, parallel, and CMOS output bus. Be Article source network

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