1 hardware platform
1.1 ADSP-BF561 processor
Blackfin561 is a high-performance fixed-point DSP video processing chip in the Blackfin series. Its frequency is up to 750 MHz, and its kernel contains 2 16-bit multiplier Mac, 2 40-bit accumulator ALU, 4 8-bit video ALU, and 1 40-bit shifter. The 2 sets of data address generators (DAG) in the chip can provide an address from the memory access dual operand, which can process 1200M sub-multiplication operations per second. The chip has a dedicated video signal processing instruction and 100KB-piece L1 memory (16KB instruction Cache, 16KB instruction SRAM, 64KB of data Cache / SRAM, 4KB temporary data SRAM), 128KB of L2 Memory SRAM, Dynamic power management function. In addition, the Blackfin processor also includes a wealth of peripheral interfaces, including EBIU interfaces (4 128MBSDRAM interfaces, 4 1MB asynchronous memory interfaces), 3 timing / counters, 1 UART, 1 SPI interface, 2 synchronous serial lines Interfaces and 1 parallel interface (support ITU-656 data format), etc. The Blackfin processor fully embodies support for media applications (especially video applications) algorithms.
1.2 Video Encoder Platform Based on ADSP-BF561
The hardware structure of the Blackfin561 video encoder is shown in Figure 1. The hardware platform uses Adi's ADSP-BF561EZ-KITLITE Evaluation Board. This evaluation board includes 1 ADSP-BF561 processor, 32MBSDRAM, and 4MBFLASH, AD-V1836 audio codec in the board can be external 4 input / 6 output audio interface, and the ADV7183 video decoder and ADV7171 video encoder can be external 3 Input / 3 Output Video Interface In addition, the evaluation board also includes 1 UART interface, 1 USB debug interface, and 1 JTAG debug interface. In FIG. 1, the analog video signal input by the camera is converted to a digital signal via the video chip ADV7183A. This signal enters the Blackfin 561 PPI1 (parallel external interface) to compress, and the compressed code stream is converted from ADSP- after the ADV7179 is converted from ADSP- The PPI2 port of BF561 is output. This system can load programs through the Flash and support serial port and network transmission. The original image in the encoding process, the data such as reference frame can be stored in the SDRAM.
Main features of 2 H.264 video compression coding algorithm
The video codec standard mainly includes two series: one is the MPEG series, one is the H.26x series. The MPEG series standard is developed by ISO / IEC organization (International Standardization Organization), and the H.26X series standard is developed by ITU-T (International Telecom Alliance). The I-TU-T standard includes H.261, H.262, H.263, H.264, etc., mainly for real-time video communications, such as television conferences.
The H.264 video compression algorithm is similar to H.263 and MPEG-4, block-based blending encoding methods, which use intra encoding (intra) and inter-Inter-Inter-Inter-Inter-INTER. Compared to previous coding standards, in order to improve coding efficiency, compression ratio, and image quality, H.264 uses the following new encoding techniques:
(1) H.264 is divided into two levels of video coding systems into video encoding layers (VCL, VIDEOCODINGLAYER) and network abstraction layers (NAL, NetworkAbstractionlayer). Where VCL is used to complete the efficient compression of the video sequence, NAL is used to specify the format of video data, mainly providing head information to suit the transmission and storage of various media.
(2) Advanced intra prediction, it is predicted with a macroblock containing more space domain details information, and for a flattened area, a prediction mode of 1616 is employed. The former has 9 predictive methods, and there are 4 predictions. method.
(3) Inter Bloom prediction uses more block division types, defined in the standard (1616, 16 × 8, 8 x 16) and sub-macroblock segmentation (8 × 8, 8 ×) 4, 4 × 8, 4 × 4). Since smaller blocks and adaptive coding methods are used, the amount of data of the predicted residual can be reduced, thereby further reducing the code rate.
(4) High-precision, 1/4-pixel precision motion prediction.
(5) Multi-reference frame prediction can be performed. At inter-frame encoding, up to 5 different reference frames can be selected.
(6) Integer transformation (DCT / IDCT). The 4 × 4 integer transform technology of the residual image is used to replace the floating point operation in the previous DCT transformation. To reduce the encoding time, it is also more suitable to port the hardware platform.
(7) H.264 / AVC supports two entropy coding methods, ie CAVLC (based on context-based adaptive variable long coding) and CABAC (based on context-based adaptive arithmetic coding). Where CAVLC has a relatively high resistance, the coding efficiency is lower than CABAC; and the CABAC has high coded efficiency, but the amount of calculated amount and storage capacity are larger.
(8) The new loop filtering technology and entropy coding techniques are used.
These new technologies of H.264 make moving image compression techniques into a big step, which has a compression performance better than MPEG-4 and H.263, which can be applied to high performance such as Internet, digital video, DVD and TV broadcasts. Video compression field.
3 H.264 video coding algorithm
The H.264 is improved in DSP to pass the following three steps: the C algorithm on the PC is optimized, transplant from the PC to the DSP, and the code optimized on the DSP platform.
3.1 Optimization of C algorithm on the PC machine
According to system requirements, this design selects the ITU JM8.5 version BaselineProfile as standard algorithm software. The reference software JM of the ITU is based on the PC design, so high coding effects can be achieved. When porting the video codec software to the DSP, the DSP system resources should be considered, the factors that should be considering are system space (including program space and data space), so you need to evaluate the original C code, this needs to The transplanted code is understood. Figure 2 shows the algorithm structure of H.264.
After understanding the algorithm structure, it also needs to be determined in the implementation of the encoding algorithm, and the amount of computation is large and the time consumes longer. The PROFILE analysis tool comes with the VC6 displays: the intra and the inter-frame encoding portion occupies more than 60% of the overall running time. Among them, ME (MovestiMation, motion estimation) has taken more time. Therefore, the focus of transplantation and optimization should be estimated in motion, and therefore, the code structure should be adjusted. Technology area
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