The media once won the AI chip TPU (Tensor Processing Unit) to Google, and Google refused to evaluate, but he immediately had more news announced. After a day, Google has changed attitudes and responded to some issues. The problem is that the spokesperson responded through the form.
Let's take a look at how Google explains TPU:
1, TPU pre-training?
This is a big problem, Google can't answer. It may be pre-trained, but we don't know exactly. Whether the TPU is trained, it depends on whether the AI algorithm it performs is trained in the independent system. To train AI systems to identify a picture, you must show it millions of pictures, and try to learn. Once you are done, you only need to let the algorithm run on the chip. For example, IBM's Truenorth and Fathom chips (from entrepreneurial Movidius) are trained. TPU has a big possible training, but Google will not say this.
2, if the AI algorithm changes, can the TPU can reprogram?
This problem includes two sub-problems, it is necessary to explain it. According to the classification of the chip, the TPU can be considered an ASIC (special application integrated circuit), and simply is that only a very high efficiency in one thing when designing the chip.
In the expected, our problem should be like this: If the AI algorithm changes (from logically talking about time, you should change), do you want a chip that can reprogram, to adapt to these changes? If this is the case, another chip is suitable, it is FPGA (field programmable gate array). FPGA can be programmed, and different from ASIC. Microsoft uses some FPGA chips to enhance the AI function of the must search engine. We will naturally ask: Why don't you use FPGA?
Google's answer is that the calculation efficiency of FPGA is much lower than the ASIC because it can be programmed. The TPU has an instruction set that can run on the TPU when the Tensorflow program changes, or when the new algorithm appears.
The answer to the question now begins to emerge. In Google, energy consumption is an important consideration standard, the data center is quite huge, building around the world, including Finland and Taiwan. The higher the energy consumption, the higher the cost of operation, and the actual consumption will be doubled over time. Google engineers contracted the efficiency of FPGA and ASIC, and finally decided to choose ASIC.
The second part of the problem is related to the TPU's instruction set. This is a basic command that exists in the chip in hard coding form, recognizes, executed; in the chip world, the instruction set is the basis of computer operation.
When developing the TPU instruction set, it is specifically used to run Tensorflow, Tensorflow is an open source software library, targeting the development of AI applications. Google believes that if the AI is necessary to change at the bottom layer, it is extremely possible to happen to the software, and the chip should have elasticity to adapt to this change.
The technical details of the TPU architecture make many people who understand the chips amazed. Anandtech's Joshua Ho has an interesting theory: TPU is more similar to the third type of chip, which is the so-called digital signal processor.
3. Is the TPU only run TensorFlow?
There are about 5 software languages for AI applications, can TPU support these languages? Google's answer is: Other code can run on the TPU, but TPU has been optimized for Tensorflow.
4, can several TPUs can connect to each other, form a system synergistic operation?
Google's answer is: Alphago Go AI has installed multiple TPUs, which can be run at an integral part of a huge system.
This is a super interesting answer, our brain sea is not self-discovered, "Skynet" Vision: Many AI chips have complete transcendence of human thinking in everything.
5. In the server rack, why is the TPU to insert into a hard disk position?
Google has said that TPU will be inserted on the server rack, the rack is close to the hard drive, which looks a bit strange. Why didn't put the TPU near the server CPU, so all the calculations can be done in one place?
Google's answer is this: TPU has a PCIE connector. The PCIe is connected to the motherboard PCIE slot or is connected to a short cable, which is not different. There is space on the hard disk of the Google server, which is more convenient to install.
6, where is there?
Be
Google's answer is: under the heat sink.
As we think. If you look back to the first question - is also the problem of chip pre-training, you will know that the training chip requires a lot of memory. Google wants to train AI with a massive picture, it seems that there is no sufficient space below the radiator to install a large amount of memory. The memory on the chip doesn't look much, so the possibility of TPU has actually trained further improve.
7, where is the chip made?
Google did not answer this question. Unless Google has a secret factory in a certain place, only ask others to produce TPUs. There are two largest chip manufacturers in the world technology, the most advanced: TSM, Globalfoundries. Let us continue to guess.
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