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    Xilinx launches next-generation Zynq UltraScale + RF So, integrate digital hardware with analog modules to a single chip

     

    Like 4G and 3G era, the construction of 5G networks requires many embedded wireless devices. The contractor technical facilities and test platform, usually can not spend all components readily available. Because of its many requirements, such as flexibility, density, fast release, and reconfiguity. The good news is that Xilinx has introduced its next generation Zynq Ultrascale + RF So today, integrating the digital hardware with analog module into a single chip. RF SOC is a single-chip adaptive radio platform, which is integrated with its hardware, programmable software engine, and RF simulation technology, and RF simulation technology, Xilinx. In the previous generation of products, the system needs to rely on multiple chips to perform all tasks. But now, Xilinx provides an extremely simplified solution design that integrates a complete RF signal chain. From Mac to DSP, wireless IP, baseband, modulation, DSP signaling, general digital processor, ADC / DAC, and heavy, DDR4 memory subsystem. Xilinx said that one of RFSOC's advantages lies in the Massive-MIMO RF module for wireless networks. The company introduces that with the help of RFSOC, 64x64 mimo can reduce power consumption and 75% installation amount, and the number of system components is reduced by 89%. Today, RFSoc new products, including second generations and third generation products. In an initial product, Xilinx provides a solution that covers the 4GHz band and DOCSIS 3.1, and implements the partial positioning required for 5G deployment. The second generation of products is based on the rapid strategic adjustment of the initial generation of rapid listed programs, which can cover the 5GHz band in order to be put into use as soon as possible. The third generation of products belongs to the refreshing design, covering the 6GHz band, supports authorized and blank spectrum to achieve 5G deployment worldwide. But first, go out of the door, or the second generation of products. As mentioned above, it is a preliminary adjustment enhancement version of the Asian market, which is expected to start testing under the 5G frequency as soon as possible. Xilinx said that engineering samples can be provided to specific customers and will be fully put into production in June 2019. The third generation of products use a similar underlying hardware (quad-core A53 + with a programmable logic a5 CPU). However, there is a fixed function ADC / DAC upgrade, and support 6GHz band on different clock fields, enhanced programmable logic clocks, especially for additional DSP requirements for 6GHz with up to 14-bit processes. Xilinx said that third-generation products will reduce power consumption, expand millimeter wave interfaces on TDD, and complete multi-band / multi-standard support. The enhanced clock also means that in the external clock generator mode, the entire design requires only one external clock generator, not the up to four previously required. Xilinx indicates that its integrated analog / digital solution also helps the implementation of millimeter wave extended intermediate frequency. One problem with traditional design is that the interface between the radio frequency sampling discrete DSP and the digital front end is a given standard (ie JESD 204). However, in the 16x16 antenna scheme, the standard interface is at 320 GB / s, and the power consumes about 8W. If you need to resolve the high frequency spectrum of 800 MHz, power consumption will increase. By integrated numbers in the third product, Xilinx can complete all interfaces in single-chip, resulting in lower power consumption, and higher speed transmission. The company claims that Xilinx claims that it allows first-level suppliers to use their custom programmable IP and RF support. Secondary suppliers can also use exclusive, or fixed IP solutions. With this design, Xilinx can add RF markets to its product portfolio. It is reported that the third generation RFSOC will start in the second half of 2019 and start mass production in the third quarter of 2020. As for why I want to drag for so long, it is because the supplier verifies the test schedule, which is more than a long time. This section will cover all the 6GHz band chips that have not yet authorized. It should be noted that the second and third generation devices, will remain on the pin-compatible with the first generation hardware. Suppliers interested in new components can be contacted with local Xilinx representatives to get more information. Hot recommendation: Intel Nerve Calculation Stand 2, upgrading machine vision to a new level Micro-core SAM R34 XPLAINED PRO Evaluation Suite Extended Circuit Board Characteristics, Simplified Custom Development US letter MAX77278 ultra low power PMIC provides high integrated power solutions NXP LPC54018 Internet of Things Module OM40007, let your schedule fall more quickly Analog Devices Eval-ADXL362 Evaluation Board to Develop Designers More Choice Original address: https://www.eeboard.com/news/xilinx-5g-soc/ Search for the panel network, pay attention, daily update development board, intelligent hardware, open source hardware, activity and other information can make you master. Recommended attention! [WeChat scanning picture can be directly paid]

     

     

     

     

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