Xilinx provides ultra-low delay coding schemes that can be verified on ZCU106 board

Xilinx provides ultra-low delay codec schemes that can be verified on the ZCU 106 board. Document MPSOC VCU TRD 2020.2 Low Latency NV16 provides detailed commands. The following command can behave more stable. Note that each line is final, indicating that the Bank has not ended, and the next row is also the Bank. Be sure to ensure the last behind, there is no character, you should pay attention to no space characters. Send end command: Gst-launch-1.0 -V v4l2src device = / dev / video0 o-mode = 4 ! Video / X-Raw (Memory: XLNXLL), Format = NV16, Width = 3840, Height = 2160, FRAMERATE = 60/1 ! OMXH265ENC NUM-SLICES = 8 periodicity-idR = 240 cpb-size = 500 gdr-mode = horizontal Initial-delay = 250 control-rate = low-latency prefetch-buffer = true Target-bitrate = 25000 gop-mode = low-delay-p ! VIDEO / X-H265, Alignment = NAL! Queue max-size-buffers = 0! RTPH265PAY ! UDPSINK BUFFER-SIZE = 60000000 Host = 127.0.0.1 Port = 5004 async = FALSE Max-lateness = -1 QoS-DSCP = 60 max-bitrate = 120000000 -V Before executing the above command, you need to configure the video input Pipeleine to 4K NV16 mode and specify the IP in the received board. Receive end command: Gst-launch-1.0 udpsrc port = 5004 buffer-size = 60000000 Caps = Application / X-RTP, Media = Video, Clock-Rate = 90000, PayLoad = 96, Encoding-Name = H265 ! RTPJITTERBUFFER LATENCY = 17! RTPH265Depay! H265PARSE ! VIDEO / X-H265, Alignment = NAL! OMXH265DEC low-latency = 1 INTERNAL-entropy-buffers = 5 ! Video / X-Raw (Memory: XLNXLL)! Queue max-size-bottes = 0 ! FPSDISPLAYSINK Name = falsink text-overlay = false video-sink = kmsink bus-id = A00C0000.V_Mix sync = true -v Original title: [Engineer Sharing] ZCU 106 ultra-low delay GSTREAMER codec command Article Source: [WeChat public number: FPGA development circle] Welcome to add attention! Please indicate the source of the article. Editor: HAQ, read full article, original title: [Engineer Sharing] ZCU 106 ultra-low delay GSTREAMER codec command Article Source: [Micro Signal: FPGA-EETREND, WeChat public number: FPGA Dry goods] Welcome to add attention! Please indicate the source of the article.

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