There are two main types of DMOS, vertical double-diffused metal oxide semiconductor field effect transistor VDMOSFET (vertical double-diffused MOSFET) and lateral double-diffused metal oxide semiconductor field effect transistor LDMOSFET (lateral double-dif fused MOSFET). LDMOS is widely adopted because it is easier to be compatible with CMOS technology. LDMOS
LDMOS (laterally diffused metal oxide semiconductor)
LDMOS is a power device with a double diffused structure. This technique is to implant twice in the same source/drain region, one implantation of arsenic (As) with a larger concentration (typical implantation dose of 1015cm-2), and another implantation of boron (with a smaller concentration (typical implantation dose of 1013cm-2)). B). After the implantation, a high-temperature propulsion process is carried out. Since boron diffuses faster than arsenic, it will diffuse further along the lateral direction under the gate boundary (P-well in the figure), forming a channel with a concentration gradient, and its channel length Determined by the difference between the two lateral diffusion distances. In order to increase the breakdown voltage, there is a drift region between the active region and the drain region. The drift region in LDMOS is the key to the design of this type of device. The impurity concentration in the drift region is relatively low. Therefore, when the LDMOS is connected to a high voltage, the drift region can withstand a higher voltage due to its high resistance. The polycrystalline LDMOS shown in Fig. 1 extends to the field oxygen in the drift region and acts as a field plate, which will weaken the surface electric field in the drift region and help increase the breakdown voltage. The size of the field plate is closely related to the length of the field plate [6]. To make the field plate fully functional, one must design the thickness of the SiO2 layer, and second, the length of the field plate must be designed.
The LDMOS device has a substrate, and a source region and a drain region are formed in the substrate. An insulating layer is provided on a part of the substrate between the source and drain regions to provide a plane interface between the insulating layer and the surface of the substrate. Then, an insulating member is formed on a part of the insulating layer, and a gate layer is formed on a part of the insulating member and the insulating layer. By using this structure, it is found that there is a straight current path, which can reduce the on-resistance while maintaining a high breakdown voltage.
There are two main differences between LDMOS and ordinary MOS transistors: 1. It adopts an LDD structure (or called a drift region); 2. The channel is controlled by the lateral junction depth of two diffusions.
1. Advantages of LDMOS
• Excellent efficiency, which can reduce power consumption and cooling costs
• Excellent linearity, which can minimize the need for signal pre-correction
• Optimize ultra-low thermal impedance, which can reduce amplifier size and cooling requirements and improve reliability
• Excellent peak power capability, high 3G data rate with minimal data error rate
• High power density, using fewer transistor packages
• Ultra-low inductance, feedback capacitance and string gate impedance, currently allowing LDMOS transistors to provide 7 bB gain improvement on bipolar devices
• Direct source grounding improves power gain and eliminates the need for BeO or AIN isolation substances
• High power gain at GHz frequency, resulting in fewer design steps, simpler and more cost-effective design (using low-cost, low-power drive transistors)
• Excellent stability, due to the negative drain current temperature constant, so it is not affected by heat loss
• It can tolerate higher load mismatch (VSWR) better than dual carriers, improving the reliability of field applications
• Excellent RF stability, with a built-in isolation layer between the gate and drain, which can reduce the feedback capacitance
• Very good reliability in the mean time between failures (MTTF)
2. The main disadvantages of LDMOS
1) Low power density;
2) It is easily damaged by static electricity. When the output power is similar, the area of the LDMOS device is larger than that of the bipolar type. In this way, the number of dies on a single wafer is smaller, which makes the cost of MOSFET (LDMOS) devices higher. The larger area also limits the maximum effective power of a given package. The static electricity can usually be as high as several hundred volts, which can damage the gate of the LDMOS device from the source to the channel, so anti-static measures are necessary.
In summary, LDMOS devices are particularly suitable for applications requiring wide frequency range, high linearity and high service life requirements such as CDMA, W-CDMA, TETRA, and digital terrestrial television.
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