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    CMOS / TTL logic test pen, detect clock signal ----- CMOS / TTL Logic Tester

     

    CMOS / TTL logic test pen, detectable clock signal, CMOS / TTL Logic Tester Keywords: CMOS / TTL logic test pen, detectable clock signal CMOS / TTL logic test pen, detectable clock signal This circuit (see Figure) can be used to test logic status of CMOS and TTL logic circuits, and can also test any clock signals above Hz to 10 MHz or more in the logic circuit. The power supply of the probe circuit can be used with a crocodile clip to take the power supply in the measured circuit. In this circuit, the LM319 dual comparator chip IC1 is connected to a window detector, and the inverting input of the comparator N1 is biased to approximately 2V when the switch S1 sets the TTL position. When S1 is set to the VCC 80 when S1 is set to the CMOS position %. Only when the logic probe input voltage exceeds the bias voltage, the output of N1 can turn low potential, red LED1 illuminates, indicating that the logic probe measured is "1". In the same way, the inverting input of the comparator N2 is biased to 0.8V when the switch S1 is set to the TTL position, and when the S1 is set to 20% of the VCC when the CMOS position is set. Only when the logical probe input voltage is less than the bias voltage, the output of N2 can turn low potential, green LED2 illuminates, indicating that the logical state measured by the logic probe is "0". The logic probe also is connected to the N3 input of the chip CD4049 (six-inverter IC2) by C1, which can be sent to the AC and clock signals. The role of N3 is a buffer, which only couptes N3 input, and the pulse drops of the output ends along the input of N4. The output of N4 is coupled to N5. N5 is connected to a single stabilizing circuit, and outputs it in the input of N4 to ensure that the capacitor C4 (0.47uF) can be sufficiently discharged by the resistor R10 (4.7 MΩ), and the clock pulse that subsequently sent to the N4 input is invalid. N6 is used to drive yellow LED3, and its short-term illumination means that the probe measures the oscillation input. The output of N6 is also used to enclose and activate an oscillator composed of N7 and N8, which is used to push the buzzer PZI to vote in a single raw cycle, indicating that the probe is measured to the oscillation input. Therefore, the test clock pulse and oscillation signals are visible, and there are two indications for the test logic probe. See the test results. Translation: Ziang

     

     

     

     

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