"Popular control mode in the current industrial control system: The underlying device uses the RS232 bus structure, and the upper management is generally used in Ethernet structure. This control method allows the signal to publish and share the signal on the company's intranet, but also in Internet / Any location of the intranet, the on-site smart device, the functional configuration, and remote diagnosis, etc., implements openness and interoperability in the true sense of the control network. The RS485 bus is a serial based on balanced transmission and differential reception. The bus has a strong anti-current mode interference ability, and the transmission distance is far from the appropriate baud rate. At the same time, due to its simple design, it is easy to control, it is easy to carry out network expansion, and is widely used in many industrial scenes.
The embedded Ethernet adapter studied in this paper is to solve the problem of embedded equipment network communication, which is convenient for embedded systems and computer networks to implement remote monitoring, access, and data transmission.
First, main chip selection and introduction
1, single-chip AT89S52
The AT89S52 as the core processor in this design. AT89S52 is a low-power, high-performance CMOS8 bit microcontroller produced by ATMEL, with a 8k byte EPROM and 256 bytes of RAM. Has ISP (in system programming) function. It has the advantages of high flexibility, convenient use, low price. Therefore, the chip has been widely used in an embedded control system. Single chip AT89S52 is transmitted to the PC through Ethernet to implement remote control. Using the AT89S52 ISP (in system programming) function, it is easy to write a compiled program into a single-chip microcomputer, and it is easy to debug, modifications, and upgrades. Since the AT89S52 microcontroller itself provides a set of full-duplex serial transport ports, the serial data is transmitted by the TXD pin, and the RXD pin receives the data, but its working logic level is TTL level (0V, 5V) ). The minimum system of AT89S52 is shown in Figure 1.
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Figure 1 AT89S52 minimum system
2, network control chip ENC624J600
ENC624J600 Network Controller is an independent Ethernet control chip with industry-standard serial interface and parallel interfaces, designed for embedded application systems. The ENC624J600 communicates with the single-chip microcontroller via the SPI or parallel interface, the data transfer rate is 14Mbit / s (for SPI) to 160Mbit / s (for 16-bit parallel interface), the main features of the ENC624J600 have, adaptive selection transmission rate, support 10Mbit / S or 100 Mbit / S; fully support half-duplex or full-duplex exchange Ethernet; programmable fill and CRC generation; provide 24kba-on-chip RAM buffer for performing sending and pickup operation, the main single-chip can also use it Perform regular storage operations; support bus 8-bit or 16-bit CPU access, programmable automatically reject error packets; can be automatically retransmitted to occur when conflicts.
The ENC624J600 device complies with all specifications suitable for 10 Base-T and 100 Base-TX Ethernet in IEEE 802.3, including many options, such as automatic negotiation. The ENC624J600 device uses a series of packet filtering mechanisms to limit the incoming packet. It also provides a 16-bit wide internal DMA to achieve fast data throughput and hardware IP checksum computing support. A secure engine module is provided for applications that require SSL, TLS, and other protocols related to encryption. The engine can perform RSA, Diffie- Hellman, AES, MD5, and SHA-1 algorithms to shorten code size, speed up the establishment and throughput of the connection, and reduce the workload of firmware development. With SPI or parallel interfaces with single-chip microcomputer, the data transfer rate is 14 Mbit / s (for SPI) to 160 mbit / s (for 16-bit solution parallel interface). A pin dedicated to LED connection, activity indication, and transmission / reception / DMA interrupt is provided. A universal 24 KB-sliced RAM buffer is provided for performing sending and receiving operations. The main single-chip can also use it to perform conventional storage operations. Communication protocols (e.g., TCP) can be saved with this memory that may need to resend data. In the final product is easy to productively, each device of the ENC624J600 series is pre-programmed with the unique non-volatile MAC address. In most cases, this will save the final device to the serial programming step, and FIG. 2 shows a general block diagram of the device.
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Figure 2 block diagram of ENC624J600
3, external data storage FM1808
The FM1808 is a parallel interface 256kbit ferroelectric memory based on the principle of ferroelectric memory. The main characteristics of FM1808 are as follows: manufacturing with advanced ferroelectric technology; storage capacity is 256kbit; read and write life is 10 billion; power down data can be saved for 10 years Write data is free of time; access time is 70ns; low power consumption, operating current is 25mA, standby electricity flow only 20ua; use single 5V operating voltage; operating temperature range is -40 ° C ~ + 85 ° C; has particularly excellent Moisture, anti-electric shock and seismic performance; compatible with SRAM or Parallel EEPROM pin.
Second, hardware circuit design
1, the design of the AT89S52 and Ethernet controller connection circuit
In this system, the P0 port is used as a low 8-bit address / data, and the 8-bit data interface used to connect NC624J600 when using the data cable. When used as an address line, in order to provide an ENC624J600 to provide a low 8 bits of the 15-bit address, multiplexing techniques are used to separate the address and data. Therefore, the P0 port is connected to D0 to D7 of 74LS373, and the low 8-bit address is temporarily stored, and then the addresses of the address latch provide 15-bit addresses from the ENC624J600, and the high seven bits are provided by the P2 port by 74LS245. ,As shown in Figure 3.
To make the interface with the microcontroller, the ENC624J600 device provides two options: a serial interface and a flexible 8/16 bit parallel from the port interface based on the serial peripheral interface (SPI) standard. Only one interface can only be used at any given time. In this topic, the connection of the AT89S52 single-chip microcontroller and ENC624J600 selects the PSP interface, as shown in Figure 3. To select a PSP interface, select the I / O interface by the hardware through the SPISEL function on the INT / SPISEL pin at power-on. To do this, you need to be applied to the level of 1 to 10 μs to the level of the pin after power supply to the device and the device exits power-on. A serial interface will be enabled if the SPISEL is locked in a logic high level. If the SPISEL is locked in a logic low state, the PSP interface is enabled.
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Figure 3 Design of the AT89S52 and Ethernet controller connection circuit
2, AT89S52 and circuit design with external expansion memory FM1808
The connection between the AT89S52 and the FM1808 is similar to the AT89S52 and the NC624J600, and the P0 port is multiplexed as a low 8-bit address / data, and the 8-bit data used to connect FM1808 when using the data line. When used as an address line, use multiplexing techniques, separate the address and data, provides a lower 8 bits of 15 bits of addresses, while 7 bits are provided by the P2 port by 74LS245, as shown in FIG.
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Figure 4 AT89S52 and circuit design with external expansion memory FM1808
3, power supply circuit design
The power module is the most basic component of a board. Only the stable and reliable power supply is the board power supply to ensure the normal operation of each function module, so the power consumption of all components of the circuit board should first be initially calculated when the power module is designed. , Then select the corresponding chip to perform the DC power module design under the premise of ensuring power consumption, try to do small size, light weight; cost-effective; long-term stable, reliable work.
The power required for this adapter is 3.3V. The system requires a 3.3V power supply to power supply chip Ethernet controller, etc. Considering that the system may work in high-speed communication mode, consume current is very large, so use 1 UC385 chip, each UC385 output current can reach 800mA, which can fully meet the system's needs. The specific circuit is shown in Figure 5.
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Figure 5 Power module design
Third, software part design
1, main function
The ARP is queried first. If the Mac is not got, the ARP request is sent. If there is a new data, if the TCP response is not completed, the TCP is heard, complete the TCP three handshakes. Then respond to HTTP based on the request type.
2, TCP response section
1) Three handshake stages
The so-called Three-Way Handshake refers to the establishment of a TCP connection, requiring the client and the server to send a total of 3 packages. The purpose of the three handshake is to connect the server to specify port, establish a TCP connection, and synchronize the serial number and confirmation number of the two sides and exchange TCP window size information.
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Figure 6 Three-way handshake (Three-Way Handshake)
First handshake: The client sends a TCP's SYN flag position 1 of the package refers to the port of the client intended to connect to the server, and the initial number X, saved in the sequence number field of the header (the Sequence Number "field.
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Figure 7 first handshake
Second Hand Hand: Server Send a confirmation package (ACK) answer. That is, the SYN flag bit and the ACK flag are 1 at the same time, and the confirmation number (Acknowledgement Number) is set to the customer's ISN plus 1. That is, X + 1.
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The third handshake, the client re-sends a confirmation package (ACK) SYN flag bit is 0, the ACK flag is 1. and send the server to the serial number field +1, put it in the determination field to each other. And in the data segment 1 +1
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Figure 9 Third handshake
In fact, the confirmation number should be the other party sequence number plus 1. When transmitting data, the other party serial number plus the length of the other party carrying the application layer data.
In the process of transmitting the TCP sub-package, it is also necessary to send a package, confirm a packet, and the TCP confirmation package is only 54 bytes, which is only head information. Therefore, in the transmission TCP subclony sequence number, the confirmation number is incremented by the length of the transmitted data.
3, http
1) request
After the connection is successfully established, start to send a request to the web server. This request is typically GET or POST command (POST is delivered to the FORM parameter). The format of the GET command is: GET path / file name HTTP / 1.0 file name points to the file accessed, and HTTP / 1.0 pointed out the HTTP version used by the web browser. Can now send a get command: get /mytest/index.html http / 1.0,
2) answer
The web server receives this request for processing. Search from its document space to search the subdirectories MyTest file index.html. If you find this file, the web server transmits the content to the corresponding web browser. In order to inform the browser, the web server first transmits some HTTP header information, and then transmits the specific content (ie HTTP body information), and the HTTP header information and HTTP information are separated from one blank line. Common HTTP headers are:
1 HTTP 1.0 200 OK This is the first line of the web server response, lists the HTTP version number and response code that the server is running. The code "200 ok" indicates the completion of the request.
2 MIME_VERSION: 1.0 It indicates the version of the MIME type.
3 Content_Type: Type This header information is very important, it indicates the MIME type of HTTP information. Such as: content_type: text / html indicates that the transferred data is an HTML document.
4 Content_length: The length value indicates the length of the HTTP body information (bytes).
3) Turn off the connection
When the response is completed, the web browser must disconnect to ensure that other web browsers can connect with the web server.
4, submit form GET / POST
After the data requested by the GET will be attached to the URL (that is, put the data in the HTTP protocol header), Split the URL and transfer data, between the parameters, such as: login.action? Name = hyddd & password = idintknow & verify =% E4% BD% A0% E5% A5% BD. If the data is English letters / numbers, it is sent. If it is a space, convert to +, if it is Chinese / other characters, use Base64 encryption directly to:% E4% BD% A0% E5% A5% BD, where the XX in the% XX is ASCII represented by the symbol at 16.
POST puts the submitted data in an encapsulated in an HTTP package. In Form (form), Method defaults to "get".
The submission data is submitted to the form data in this article is a POST mode, and the GET is used when the control information form is submitted. The following is the way to use the captain to see their differences.
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Figure 10 POST method
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Figure 11 GET mode
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Figure 12 GET method is the submitted data directly in the URL
5, overall software design
The AT89S52 microcontroller first initializes the ENC624J600, first query the ESTAT register's CLKRDY bit, make sure there is enough delay before configuring the Mac and PHY registers; the PHY register is used to set communication mode; programming erxst and erxnd refers to the initialization of the receiving buffer When the ERXST pointer is programmed, the same value will automatically update the ERXWRPT register, and the received hardware will start writing from the address in ERXWRPT to the received data, and the ERXRDPT register also needs to be programmed by the same value;In order to minimize the processing workload of the main controller, the ENC624J600 is equipped with different filters, which can automatically reject unwanted packets, all filters are configured by the ERXFCON register, and you can use the Andor bit to several filters The test results of the device are logical / and 0 or logic / or 0 operations; since the storage space that is not used as the receiving buffer is used as the transmit buffer, it is not necessary to initialize the transmission buffer, usually store spatial allocation. For large reception buffers and smaller reception storage spaces.
After the initialization is completed, that is, enter the main loop program, the microcontroller will repeatedly detect whether the ENC624J600 receives the Ethernet frame (or data needs to be transmitted in the data buffer B), and when data is received (or transmit), according to the flag Subfrextage, store data into the data buffer (or send to Ethernet). The main program flow is shown in Figure 13.
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Reprinted from - Weicu Electronic Market Network "
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