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    Experience over 10 years of electronic engineering about PCB design line precautions!

     

    "Precautions for PCB design routing are summarized as follows: 1. General rules 1.1 digital, analog and DAA signal wiring areas are pre divided on the PCB. 1.2 digital and analog components and corresponding wiring shall be separated as far as possible and placed in their respective wiring areas. 1.3 high speed digital signal routing shall be as short as possible. 1.4 sensitive analog signal routing shall be as short as possible. 1.5 reasonably distribute power and ground. 1.6 DGND, agnd and field separation. 1.7 wide wires shall be used for power supply and critical signal routing. 1.8 the digital circuit is placed near the parallel bus / serial DTE interface, and the DAA circuit is placed near the telephone line interface. 2. Placement of components 2.1 in the system circuit schematic diagram: a) Divide digital, analog, DAA circuits and their related circuits; b) Divide digital, analog and hybrid digital / analog components in each circuit; c) Pay attention to the positioning of power supply and signal pins of each IC chip. 2.2 preliminarily divide the wiring area of digital, analog and DAA circuits on PCB (generally 2 / 1 / 1). Digital and analog components and their corresponding wiring shall be far away from and limited in their respective wiring area as far as possible. Note: when DAA circuit accounts for a large proportion, there will be more control / status signal routing through its wiring area, which can be adjusted according to local rules, such as component spacing, high voltage suppression, current limitation, etc. 2.3 after preliminary division, place components from connector and Jack: a) Place plug-ins around connector and jack; b) Leave space for power supply and ground wiring around components; c) Place the corresponding plug-in around the socket. 2.4 first place hybrid components (such as modem devices, a / D, D / a conversion chips, etc.): a) Determine the placement direction of components, and try to make the digital signal and analog signal pins face their respective wiring areas; b) Place components at the junction of digital and analog signal wiring area. 2.5 place all simulators: a) Place analog circuit components, including DAA circuit; b) The simulators are close to each other and placed on one side of the PCB containing txa1, TXA2, Rin, VC and VREF signal wiring; c) Avoid placing high noise components around txa1, TXA2, Rin, VC and VREF signal wiring; d) For serial DTE modules, DTE EIA / tia-232-e The receiver / driver of the series interface signal shall be close to the connector as far as possible and away from the high-frequency clock signal routing, so as to reduce / avoid the increase of noise suppression devices on each line, such as choke and capacitance. 2.6 placing digital components and decoupling capacitors: a) Digital components are placed in a centralized manner to reduce the wiring length; b) Place a 0.1uF decoupling capacitor between the power supply / ground of the IC, and the connection route shall be as short as possible to reduce EMI; c) For parallel bus module, the components are close to each other The connector edge shall be placed to meet the application bus interface standard, such as the ISA bus routing length is limited to 2.5in; d) For the serial DTE module, the interface circuit is close to the connector; e) The crystal oscillator circuit shall be as close to its driver as possible. 2.7 the ground wire of each area is usually connected at one or more points with 0 ohm resistance or bear. 3. Signal routing 3.1 in modem signal routing, signal lines prone to noise and signal lines susceptible to interference shall be kept away as far as possible. If it is unavoidable, neutral signal lines shall be used for isolation. The signal pin, neutral signal pin and signal pin vulnerable to interference of modem are shown in the table below: 3.2 digital signal wiring shall be placed in the digital signal wiring area as far as possible; Analog signal wiring shall be placed in the analog signal wiring area as far as possible; (isolation routing can be pre placed to limit the routing to prevent the routing from laying out the wiring area) digital signal routing and analog signal routing are vertical to reduce cross coupling. 3.3 use isolated routing (usually ground) to limit analog signal routing to analog signal wiring area. a) The isolated ground wiring of the analog area surrounds the analog signal wiring area, which is arranged on both sides of the PCB board, with a line width of 50-100mil; b) The isolated wiring of the digital area shall surround the digital signal wiring area, which shall be arranged on both sides of the PCB with a line width of 50-100mil, and the edge of one PCB shall be arranged with a width of 200mil. 3.4 parallel bus interface signal wiring line width > 10mil (generally 12-15mil), such as / HCS, / HRD, / HWT, / reset. 3.5 analog signal wiring line width > 10mil (generally 12-15mil), such as MICM, micv, spkv, VC, VREF, txa1, TXA2, RXa, Telin and telout. 3.6 the routing of all other signals shall be as wide as possible, the line width shall be > 5MIL (generally 10mil), and the routing between components shall be as short as possible (it shall be considered in advance when placing components). 3.7 the wiring line width from bypass capacitor to corresponding IC is > 25mil, and vias shall be avoided as far as possible. 3.8 signal lines passing through different areas (such as typical low-speed control / status signals) shall pass through isolated ground wire at one point (preferred) or two points. If the routing is only on one side, the isolated ground wire can go to the other side of the PCB to skip the signal routing and maintain continuity. 3.9 high frequency signal routing shall avoid 90 degree angle bending, and smooth arc or 45 degree angle shall be used. 3.10 high frequency signal wiring shall reduce the use of via connection. 3.11 all signal routing shall be away from the crystal oscillator circuit. 3.12 single continuous routing shall be adopted for high-frequency signal routing to avoid several sections of routing extending from one point. 3.13 in DAA circuit, leave at least 60mil of space around the perforation (all layers). 3.14 clear the ground loop to prevent accidental current feedback from affecting the power supply. 4. Power supply 4.1 determine the power connection relationship. 4.2 in the digital signal wiring area, use 10uF electrolytic capacitor or tantalum capacitor in parallel with 0.1uF ceramic chip capacitor and then connect it between the power supply / ground. Place one at the power inlet end and the farthest end of PCB board respectively to prevent noise interference caused by power peak pulse. 4.3 for the double-sided board, in the same layer of the power circuit, surround the circuit with a power line with a line width of 200mil on both sides( (the other side must be treated the same digitally) 4.4 generally, the power wiring shall be laid first, and then the signal wiring. 5. Land 5.1 in the double-sided board, the unused areas around and below the digital and analog components (except DAA) are filled with digital ground or analog area domain. The same area domains at all levels are connected together, and the same area domains at different levels are connected through multiple vias: the modem DGND pin is connected to the digital ground area, and the agnd pin is connected to the analog ground area; The digital domain and the analog domain are separated by a straight gap. 5.2 in the four layer board, digital and analog areas are used to cover digital and analog components (except DAA); The modem DGND pin is connected to the digital ground area, and the agnd pin is connected to the analog ground area; The digital domain and the analog domain are separated by a straight gap. 5.3 if EMI filter is required in the design, a certain space shall be reserved at the interface socket end, and most EMI devices (beans / capacitors) can be placed in this area; Unused areas are filled with land, and if there is a shielding shell, it must also be connected with it. 5.4 the power supply of each functional module shall be separated. Functional modules can be divided into: parallel bus interface, display, digital circuit (SRAM, EPROM, modem) and DAA. The power / ground of each functional module can only be connected at the source point of power / ground. 5.5 for serial DTE module, use decoupling capacitor to reduce power coupling, and do the same for telephone line. 5.6 the ground wire is connected through one point. If possible, use bear; If it is necessary to suppress EMI, the ground wire is allowed to be connected elsewhere. 5.7 the routing of all ground wires shall be as wide as possible, 25-50mil. 5.8 capacitor routing between all IC power supply / ground shall be as short as possible, and vias shall not be used. 6. Crystal oscillator circuit 6.1 all wires connected to the crystal oscillator input / output terminals (such as xtli and xtlo) shall be as short as possible to reduce the impact of noise interference and distributed capacitance on crystal. Xtlo routing shall be as short as possible, and the turning angle shall not be less than 45 degrees( Because xtlo is connected to the driver with fast rise time and high current) 6.2 there is no ground wire layer in the double-sided board. The crystal oscillator capacitor ground wire shall be connected to the DGND pin closest to the crystal oscillator on the device with a short wire as wide as possible, and vias shall be minimized. 6.3 if possible, the crystal oscillator shell shall be grounded. 6.4 connect a 100 ohm resistor between xtlo pin and crystal oscillator / capacitor node. 6.5 the ground of the crystal oscillator capacitor is directly connected to the GND pin of the modem. Do not use the ground wire area or ground wire routing to connect the capacitor and the GND pin of the modem. 7. Independent modem design using EIA / tia-232 interface 7.1 use metal enclosure. If it is necessary to use plastic shell, metal foil shall be pasted inside or conductive material shall be sprayed to reduce EMI. 7.2 place chokes in the same mode on each power line. 7.3 place components together and close to the connector of EIA / tia-232 interface. 7.4 all EIA / tia-232 devices are separately connected to power / ground from the power source point. The source point of power / ground shall be the power input terminal on the board or the output terminal of the voltage regulating chip. 7.5 EIA / tia-232 cable signal ground to digital ground. For analog signals, some more details are given: The design of analog circuit is the most troublesome and fatal part for engineers. Although the development of digital circuit and large-scale integrated circuit is very rapid, the design of analog circuit is still inevitable and sometimes can not be replaced by digital circuit, such as the design of RF circuit! Here, the problems that should be paid attention to in analog circuit design are summarized as follows. Some are purely empirical. I hope you can add more, criticize and correct more (1) In order to obtain a feedback circuit with good stability, it is usually required to use a small resistor or choke outside the feedback loop to provide a buffer for the capacitive load. (2) The integral feedback circuit usually requires a small resistance (about 560 Ω) in series with each integral capacitor greater than 10PF. (3) Outside the feedback loop, do not use active circuits to filter or control the RF bandwidth of EMC, but only passive components (preferably RC circuits). The integral feedback method is effective only when the open-loop gain of the operational amplifier is greater than the closed-loop gain. At higher frequencies, the integrating circuit cannot control the frequency response. (4) In order to obtain a stable linear circuit, all connections must be protected by passive filters or other suppression methods (such as photoelectric isolation). (5) EMC filters shall be used, and all IC related filters shall be connected to the local 0V reference plane. (6) Input and output filters should be placed at the connection of external cables. Any wire connection inside the unshielded system needs filtering because of antenna effect. In addition, filtering is also required at the wire connection inside the shielding system of the converter with digital signal processing or switching mode. (7) The power and ground reference pins of Analog IC need high-quality RF decoupling, which is the same as that of Digital IC. However, analog ICs usually require low-frequency power decoupling, because the power noise rejection ratio (PSRR) of analog components increases little after being higher than 1kHz. RC or LC filtering should be used on the analog power line of each operational amplifier, comparator and data converter. The corner frequency of the power filter should compensate the PSRR corner frequency and slope of the device, so as to obtain the desired PSRR in the whole operating frequency range. (8) For high-speed analog signals, transmission line technology is necessary according to their connection length and the highest frequency of communication. Even for low-frequency signals, the use of transmission line technology can improve its anti-interference, but there will be antenna effect if there is no correctly matched transmission line. (9) Avoid using high impedance inputs or outputs, which are very sensitive to electric fields. (10) Since most of the radiation is generated by common mode voltage and current, and most of the electromagnetic interference in the environment is caused by common mode problems, the use of balanced transmission and reception (differential mode) technology in analog circuits will have a good EMC Effect and reduce crosstalk. The balance circuit (differential circuit) drive does not use the 0V reference system as the return current loop, so a large current loop can be avoided, thereby reducing RF radiation. (11) The comparator must have hysteresis (positive feedback) to prevent wrong output conversion due to noise and interference, and to prevent oscillation at the breaking point. Do not use a comparator that is faster than required (keep DV / dt within the required range as low as possible). (12) Some analog ICs are particularly sensitive to RF field, so it is often necessary to use a small metal shielding box installed on the PCB and connected to the ground plane of the PCB to shield such analog components. Pay attention to ensure the heat dissipation conditions. Original link: https://www.eeboard.com/news/pcb-5/ Search aiban.com and pay more attention. You can master the latest development board, intelligent hardware, open source hardware, activities and other information every day. Recommend attention! [wechat scanning can be followed directly] Technology knew: Have you noticed FPGA design in terms of I / O signal distribution, signal integrity and differential signal? Apple IOS 10.3.3 update fixes the bug of Botong Wi Fi chip Sniping at Apple, Softbank will join hands with Xiaomi to change the world in advance? Ruff, who developed the operating system ruff OS for the Internet of things, won 21 million a round of financing Comprehensive analysis: how strong is the powerful all-round "core" dirty snapdragon 835“

     

     

     

     

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