introduction
DVI is an abbreviation for Digital VisualInterface. In embedded electronic field, there are more and more HD interfaces like DVI, and many embedded products are H. 264 video coding technology supports playing H. The 264 format of the 720P resolution video file, which requires at least 1024768 resolution display output devices.
MX51 is a high-end ARM embedded multimedia processor based on ARM Cortex-A8 kernel, which supports 720p video, can be used to develop high-definition top boxes, online access, etc., there is a need to integrate DVI. HD video terminal.
In embedded electronic products, Linux operating systems account for more and more market share. This paper uses Linux2.6.28 kernel and MX51 as the soft and hardware platform of the system, and the method of developing DVI display drivers based on FramebTffer technology is discussed in detail.
1 DVI overview
The DVI interface can only be seen on some high-end displays that generally common liquid crystal displays only VGA interfaces. The VGA interface shows an analog signal, and the DVI interface shows a digital signal. It transmits no compressed digital signals, the maximum rate can reach the high-definition video display to achieve better fidelity, reduce simulation Signal loss during signal transmission.
DVI is based on TMDS (Transition Minimized Differential Signaling, Transfer Minimum Differential Signal) technology to transmit digital signals, TMDS uses advanced encoding algorithms to encode 8 bit data (R, G, B) to 10 digits by minimum conversion Data (including line synchronization information, clock information, data DE, error correction, etc.), after DC balance, differential signal transmission data. DVI and LVDS, TTL have better electromagnetic compatibility performance, which can realize long distance, high quality digital signal transmission with low-cost dedicated cables.
2 hardware interface
The hardware platform used in this design is based on the MX51 multimedia application processor development board based on Freescale semiconductor. The processor integrates a variety of peripheral interfaces, including two liquid crystal display controllers (LCDCs) and their interfaces, which can be connected to various LCDs, with a resolution of up to 1280800 pixels. Through the LCD1 interface of the MX51, the TFP410 chip of the Said Texas Instrument Company implements the DVI video output, and the MX51 HD 720p video decoding capacity requires a larger resolution display output device. FIG. 1 is a connection diagram of the LCD1 interface of MX51 and TFP410.
The TX2 ±, TX1 ±, Tx0 ±, TXC ± signal in Figure 1 is a DVI video output signal 4 pair, and 8 signals. Data [23: 0] is a video data input signal, corresponding to the MX51 LCD1 DATA [23: 0]; DE, Vsync, Hsync, IDCK ± clock signal corresponding to the corresponding pin of LCD1, respectively. SCL, SDA is the I2C bus clock and data signal, and two pins of the MX51 I2C interface. The above hardware circuit is connected to realize the MX51 output HD video to the DVI chip, and then display it by external LCD. The internal integrated LCD controller of the MX51 processor includes the following main registers:
1LSSAR register. Set the first address of the display buffer.
2LSR register. Set the size of the display buffer.
3LPCR register. Set the pixel clock frequency PCD, synchronous clock polarity FB_SYNC_CLK_INVERT, OE signal polarity FB_SYNC_OE_ACT_HIGH, vertical signal clock polarity FB_SY NC_VERT_High_ACT, horizontal signal clock polarity FB_SYNC_HOR_High_ACT.
4LHCR register. Set hsync_len, left_margin, and right_margin of the row synchronization signal.
5LVCR register. Set Vsync_LEN, UPPER_MARGIN and LOWER_MARGIN for frame synchronization signals.
6LPCCR register. Set the display brightness of the screen, the low 8-bit control of the LPCCR control PWM pulse high level duty cycle, the adjustment range is 0x00 ~ 0xFF.
3 Linux frame buffer equipment
3.1 FrameBuffer mechanism
FrameBuffer appears in Linux2.2. A driver interface of the version of the version of the XX, which is between the upper application and the underlying display device in the Linux system. FrameBuffer blocks the difference between different display devices, abstracts the display device as a frame buffer, which is an abstract device that implements direct written screens.
FrameBuffer can be regarded as an image of the memory, and the user maps it to the process space through the memory map, and the screen output of the LCD can be directly controlled by the read / write operation of the display buffer through the memory map.
FrameBuffer drivers are based primarily based on Linux / include / Linux / FB. H and Linux / Drivers / Video / FBMEM. c These two files. FB. H contains important data structures related to frame buffer devices. FBMEM. c is a core program for the FrameBuffer mechanism, which provides a general interface for the upper layer application, and also provides an interface for the lower level specific hardware. The function in which the function can operate on the specific hardware, such as setting the register, mapping the display buffer, and so on.
3.2 Several important data structures
(1) struct fb_info
This structure is Linux as a drive layer interface defined by the frame buffer device, which contains a complete description of the frame buffer device properties and operations, and some members are defined as follows:
Among them, the VAR records the display controller parameters that the user can modify, including the screen resolution and bit width of each pixel; the Fix records the display controller parameters cannot be modified; the cmap is the current color table; FBOPS points to the underlying hardware operation Function set; DEV represents a frame buffer device; screen_base is a virtual base address of I / O mapping.
(2) Struct FB_OPS
This structure provides a function pointer to the underlying operation, and its member function is ultimately derive with the LCD controller hardware, which requires driving developers to design the hardware parameters of the LCD controller and the hardware parameters of the LCD display. Some members of this structure are defined as follows:
Among them, FB_CHECK_VAR is used to check the variable screen parameters and adjust its value for hardware support; FB_SET_PAR sets the register of the LCD controller to enter the corresponding working state according to the screen parameter, and FB_SETCOLREG sets the color register to implement pseudo Color table and color table filled.
(3) struct fb_var_screeninfo
This is the member structure of FB_INFO. It records the modified information of the frame buffer and the specified display mode, including screen resolution, bit width, frame delay, line delay, and more.
(4) struct fb_fix_screeninfo
This is the member structure of FB_INFO, which describes the properties of the display card, and cannot be modified at the system run, such as the first address, length, etc. of the buffer. When a mode is set, the memory information is given by the display card hardware, and the location of the memory is not modified.
The MX51 embeds the LCD controller inside the processor chip, which provides a direct interface for the extension of the embedded system about the display function. The LCD controller drive is the core of the DVI device driver, which is a standard FrameBuffer device driver. Design driver, the primary is to configure the LCD controller, set the frame buffer, which largely relies on the data structure described above, the drive design needs to fill in the relevant structure and complete the interface function specified by the system. Read more
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