introduction
Frequency characteristics are the most intuitive reflection of network performance. The frequency characteristic tester is used to measure the amplitude frequency characteristics and phase frequency characteristics of the network. It is a fast, simple, real-time, dynamic, multi-parameter, intuitive measuring instrument, can be widely used in the design of the scanning method. Electronic engineering and other fields. Since the price of the analog sweeper is expensive, the phase-frequency characteristics cannot be directly obtained, and the frequency response curve of the network cannot be printed, and it will bring many inconvenience to use. To this end, a low frequency band digital frequency characteristic tester is designed. The tester uses the integrated circuit AD985L dedicated to digital direct frequency synthesis technology to generate a sweep signal, with a single-chip microcomputer and FPGA to control the core, through an interface circuit such as A / D and D / A converters, to adjust the frequency of sweep signal frequency. , Digital display and the number of network amplitude characteristics and phase frequency characteristics, etc.. The system is low, the scan range is wider (10 Hz to 1 MHz), which is convenient to connect to the printer to achieve printing of the frequency characteristic curve.
2 multi-function counter design
2.1 Frequency and phase frequency characteristics measurement scheme
Solution 1: Using Formula H (S) = R (S) / E (S), the shock function is excited, and the lass transformation of the output signal is equal to the system function. However, there is a difficult function of generating a good performance. It is necessary to make FFT transformations for the acquired data, and a large number of hardware and software resources are required, and the accuracy is also limited.
Solution 2: Sweeping Test method. When the system is in excitation of the sinusoidal signal, the response signal is the same as the input excitation signal, and the magnitude ratio is the amplitude response value of the frequency, and the phase difference of the two is the phase frequency characteristic value. Test methods for adopting frequency point-by-point steps. There is no need to perform the time domain and frequency domain of the signal, which is completed by the measurement and calculation of the analog, and the accuracy is high.
In summary, select Scheme 2.
2.2 Scanning Signal Generation Plan
Solution 1: Using a single-chip function generator. Its frequency can be controlled by peripheral circuits. The resulting signal frequency is low, the anti-interference ability is poor, and the flexibility is poor.
Solution 2: Digital locking ring frequency synthesis technology. However, the phase-locked loop itself is an inert link, and the frequency conversion time is long, the reaction speed of the entire tester will be slow, and the bandwidth is not high.
Solution 3: Digital Direct Frequency Synthesis Technology (DDFS). In the control core, data in the waveform memory is addressed by the output of the output of the phase accumulator to generate a sinusoidal signal of the fixed frequency. The solution is simple, frequency stable, and strong anti-interference.
In summary, scheme 3 is used.
2.3 amplitude detection plan
Solution 1: Using diode peak detection circuits. However, the conduction drop of the diode will bring a large error, and the small signal measurement accuracy is not high, and the analog circuit is easily affected by the external, and the stability is not high.
Solution 2: Using a true values detection device. The method circuit is simple, high precision, high stability.
In summary, scheme 2 is adopted.
2.4 Phase Detection Program
Solution 1: Phase voltage conversion method. Using low pass filtering and integral. The low-pass filtering method is not high, the accuracy is not high; the integral method is high, but the integration circuit and discharge circuit are high.
Solution 2: Counting method. The two signals are different or behind, the resulting pulse duty ratio reflects the size of the phase difference, thereby measuring the phase difference. With multi-cycle synchronous counting, the quantization error can be greatly reduced, and the accuracy is high.
In summary, select the scheme 2.
3 system overall design
The system is controlled by the microcontroller and FPGA, and the frequency scan signal is generated by DDFS technology, and the signal amplitude is measured by the true value detection device AD637. In FPGA, the method of high-frequency pulse count is used to measure the phase difference. After the single-chip operation, the amplitude frequency characteristics and the phase frequency characteristic data of any frequency in 100 Hz ~ 100 kHz can be obtained, and the automatic scan of the frequency band is implemented, and in the oscilloscope The web frequency and phase frequency characteristic curve are displayed simultaneously. Use the keyboard control system to implement various functions, and display the corresponding functions and data in the LCD synchronization, the human machine interaction interface is friendly. Figure 1 shows the overall design block diagram of the system.
4 Theoretical Analysis and Calculation
4.1 Sweep Testing Theory Basis
When the frequency response is h (jω), the constant state output is Y (n) in the signal X (N) _ACOS (ω0n + f) excitation. With triangular constant, the input can be expressed as the sum of 2 complex index functions:
Therefore, the output signal and the input signal are the same sine wave, only two points: the first, amplitude is | h (ejω) | Weighted, ie the amplitude function value of the network system in ω = ω0; second, output signal A phase delay having a number of Q (ω0) relative to the input signal, that is, the network system in the phase value of ω = ω0.
4.2 DDS Signal Source
The waveform frequency generated according to the principle of DDFS is:
The FCLK in the formula is a reference frequency, and m is the phase increment factor, n is the number of bits of the accumulator. M take 22, N to take 24.
In order to obtain 100 kHz signal, and at each cycle hoped to take up to 32 or more points, the accumulator outputs the post-stage D / A conversion requires at least 3.2 MHz speed, so the establishment time is 30 ns, 10 bits. DAC900, not only meets the requirements of D / A conversion speed, but also has 10-bit data cable, which reduces quantization errors in D / A conversion. FCLK takes 40MHz, the smallest step in frequency:
4.3 Phase Differential Measurement Sets INL and IN2 The square wave signal obtained after the two channels have phase differential shape, Gate2 is the pulse signal obtained by INL and IN2, and the FO is the standard high-frequency pulse signal inside the FPGA, Take 40 MHz. In 2 ie frequency, combined with single-chip control, a dynamic gating signal GATEL can be obtained. Dynamic gating and pulse signals "and" can obtain limited pulse signals in the threshold. The 4 cycles containing IN2 in GATE1, Gate2 contains 8 different or pulses. The CLK is counted separately, and the count value M and N are obtained separately. According to formula
At f = 100 kHz, mmin≈1600, Δmax (△ ψ) ≈0.9 °
An D-flip-flop is generated inside the FPGA, and the data input of the trigger is input, IN2 is the clock input of the trigger. If the trigger output is high, △ ψ "o °; if the output is low, △ ψ "0 °.
5 main function circuit
5.1 Valid value detection module
High-precision, high-bandwidth true values detection device AD637. The output DC is about 0.1 V. There is a big error in the measurement of small signals. The system valid value detecting module is subjected to a low-pass filter with a level cutoff frequency of 10 Hz, filtering out the ripple of the DC signal. Even at the smallest valid value, there is almost no error. As shown in Figure 3.
5.2 oscilloscope display module
In order to display the curve on the oscilloscope, it is necessary to send the scan signal and the data signal to the X, Y axis to the x, y axis. The DAC0800 is used as a number of mold converters. Due to the sawtooth signal of 0 to 5 V, the data signal is a D / A converter of the data signal to the D / A converter of the scan signal, and the data signal, single pole and bipolar. Sexual approach. Figure 4 shows the DAC0800 bipolarization circuit, and the single polarity is only shorted by R1.
6 system software design
The system software part consists of single-chip microcomputer and FPGA, and the microcontroller mainly completes the processing and system of human-machine interaction, and FPGA mainly completes the implementation of the test and RAM. Modular thinking throughout the design of the entire software system is always, using menu to select the function. Figure 5 is a flow chart of the program.
7 conclusion
The frequency range of the frequency characteristic tester has a frequency range of 100 Hz to 100 kHz. The frequency stability is 10-6, and the measurement accuracy is 5%, which can be automatically stepped in the full-frequency range and a specific frequency range. Manually preset measurement Range and step frequency value. The frequency range of the phase frequency characteristic test 500 Hz ~ LO kHz, the phase value is displayed 3 bits, with 1 bit as a symbol bit, the measurement accuracy is L °, and the oscilloscope is displayed with the oscilloscope characteristics and the phase frequency characteristic curve. The system is simple, the measurement accuracy is high, feasibility and practical, its finished product has a good market.
Responsible Editor: PJ, Reading
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