"When the firmware is running slowly on the microcontroller or microprocessor, the field programmable gate array (FPGA) solves the hardware problem of real-time embedded design. At the same time, FPGA also has peripheral flexibility. However, Using FPGA, design engineers need to learn new programming languages (usually Verilog or VHDL) and a new development process to generate FPGA bit streams, and may need to put a lot of funds for purchase of FPGA development boards.
Due to these obstacles, although FPGA is a very useful tool in the design kit, many design engineers are reluctant to use. To help them overcome this mentality, some suppliers are working on shortening the FPGA learning curve. For example, Arduino has launched an Arduino ABX00022 MKR Vidor 4000 FPGA development board (see "FPGA, easy to apply quickly through Arduino Mkr Vidor 4000). Arduino MKR Vidor 4000 provides another FPGA programming method, seamlessly integrating with popular Arduino Integrated Development Environment (IDE) and can use dedicated Arduino library to achieve FPGA grade performance.
Now introduced new products to replace the early products, including Arduino Mkr Vidor 4000 boards. Alorium Technology develops a slightly different ways to add FPGA performance to the Arduino embedded development environment. This method supports both pre-configured IP blocks for I / O acceleration, and also supports custom-designed IP blocks.
This article first briefly introduces the traditional use of FPGA, then introduces Alorium's Arduino Compatible XLR8R22M08V5U0DI and Snō Snor20M16V3 FPGA modules. This article will explain how Alorium uses FPGA in the Arduino environment in a new idea, which supports preconfiguring IP, and builds custom IP, and how the designer starts to apply the FPGA module.
How to accelerate Arduino
Now, thousands of designers, engineers, developers, DIY enthusiasts, and CNG, DIY enthusiasts, are developing embedded systems for a wide range of applications. Because the use of Arduino board and Arduino IDE is very simple, it is very popular.
As Arduino users continue to advance the initial Arduino architecture to a more complex application area, performance issues begin to appear. One of the performance problems is the 8-bit architecture of the initial Arduino microcontroller too simple. Another part is that when Arduino's embedded microcontroller does not have an equivalent hardware block, the Arduino software system can only achieve a large number of real-time peripherals through software.
One solution to this performance problem is to use a more powerful microcontroller, but the software that can do in the real-time environment is limited. Some high-speed real-time peripherals must be implemented in hardware. In addition, although a microcontroller equipped with more hardware peripherals can also be used, the applicable peripheral combination depends on the specific item.
In this regard, microcontroller manufacturers often provide dozens of or even hundreds of versions in a microprocessor family to address the needs of different peripherals. However, this method is not feasible for Arduino and other plate products, as you must use a board connector with enough I / O pins to meet all requirements. Although there are many versions of Arduino boards on the market, it is still insufficient to meet the needs of all embedded projects.
FPGA meets the needs of various peripherals
By providing the embedded designer with programmable hardware, FPGA can meet peripheral combination requirements vary from project. A simple way to add FPGA functions for embedded microcontroller boards is to add FPGAs to existing design. This is also the method used by Arduino in designing Arduino Mkr Vidor 4000 board. This plate combines 32-bit ARM® Cortex®-M0 + ATSAMD21G18A-Aut Samd21 low-power microcontroller with Intel, 10Cl016Yu484C6G Cyclone 10 FPGA.
Arduino has added several hardware IP blocks to the Arduino IDE for the MKR Vidor 4000 board. These peripherals can be provided by two primates: VidorPeripherals and Vidorgraphics. When the Arduino sketch (Arduino is used to indicate the name of the program or code unit), it contains the relevant external library.
The Intel Cyclone 10 FPGA on the Arduino MKR Vidor 4000 will automatically build these hardware IP blocks. The current peripheral IP block list includes:
I2C port
SPI port
UART
High frequency PWM controller
High speed timer
High speed orthogonal decoder
Adafruit Industries' Neopixel Addressing RGB Smart LED Controller
Some peripherals (such as I2C and SPI) have been used as a software IP block for an early Arduino board. These early software implementation of equivalent IP blocks implemented on the FPGA of Arduino MKR Vidor 4000 boards are that the Peripheral performance of the FPGA version is better. For example, each I2C and SPI instantiate are implemented by independent programmable hardware blocks inside the FPGA on the board. Therefore, there is no performance loss when instantial such serial ports.
The Arduino Mkr Vidor 4000 board simplifies the use of the FPGA by the same library mechanism that is familiar with the same library mechanism that is familiar with the ARDUINO Sketch. There is no need to learn a new hardware description language (HDL) such as VHDL or Verilog. In fact, for programmers, FPGA-based peripherals is not born with any other C ++ objects. ARDUINO plans to add more such hardware IP blocks for this type of hardware.
However, Arduino MKR Vidor 4000 boards are different from the general FPGA development board because it does not support programming onboard CYCLONE 10 FPGAs with HDL code. Arduino is planning to use Intel's Quartus HDL development tools for FPGA, allowing more advanced users to achieve more use through the FPGA of Arduino Mkr Vidor 4000 boards.
Alorium takes next steps
For Arduino Compatible XLR8R22M08V5U0DI and SNOR20M16V3 Snō FPGA development board, AlORUM has taken this step by OpenXLR8 method and XCelerator Block (XB) (Figures 1 and 2). These two boards are built based on different versions of the Intel Max 10 FPGA series, which integrates a flash configuration memory. XLR8 combines Intel 10M08Sau169C8G MAX 10 with 8-bit Atmega328 instruction set compatible microcontrollers. Its shape is identical to the original Arduino UNO development board, so it is compatible with many Arduino Shield and accessories.
The ALORUM SNō FPGA development board has a relatively small size, the module size specification is 0.7 x 1.7 inches, see Figure 2. Although the physical size of the Snō FPGA development board is smaller, it integrates a higher version of Intel Max 10 FPGA. It is doubled with a logical unit: 10M16SAU169C8G max 10 FPGA has 16K, and 10M08 device on the XLR8 board is only 8K . The former's I / O pin is also more than twice the latter (32, 14 contrasting the XLR8 board).
AlORUM also provides a Snomakr10 branchboard that converts the Snō FPGA module to a slightly large Arduino profile size board, equipped with a USB port and an additional I / O division pin from FPGA. Some of the Snō FPGA modules are connected to the Arduino compatible Snōmakr bracket extension pin, while other pins are connected opposite the USB connector, a row of attached needles (Figure 3) along the edge of the development board (Figure 3).
The XLR8 and SNō FPGA development boards implements an 8-bit microcontroller and its hardware peripherals in a chip-Intel Max 10 FPGA. Figure 4 illustrates the implementation method.
The AVR compatible microcontroller core (the lower left portion of Figure 4) is the same as the Atmel Atmega328 8-bit AVR microcontroller used in the initial Arduino development board. However, the AVR microcontroller of AlORUM is implemented in a soft kernel mode in FPGA, rather than being connected to the stand-alone chip.
In Fig. 4, there are five AlORUM XBs (Xb1 to XB5) above the microcontroller core. XB is an IP block implemented by a single resource on the FPGA. The AVR microcontroller can communicate with these on-chip XB by addressable register interfaces. The XLR8 and SNō development boards include pre-installed XB (also available in Github), which are equivalent to the peripherals that Arduino developers often need to use, including:
Orthogonal decoding
Servo motor control
Neopixel RGB LED Control
12-bit enhanced ADC
Floating point mathematics
Note that the last XB listed above is not an I / O external block, but a floating point mathematical accelerator. XB can be any type of hardware accelerator, not only to I / O.
Select any block
The XLR8 and SNō FPGA development boards can be updated on-site, and the method is to select different XBs (or multiple similar xb), using AlORUM's OpenXLR8 development process to instantiate in FPGA. Developers can also use AlORUM's OpenXLR8 process to build custom Xcelerator Block (Figure 5).
Currently, to build customized XBs, designers must have Verilog or VHDL hardware description language application knowledge, and familiar with Intel Quartus FPGA Tool Suite - especially the Modelsimsim Simulation Tool of Quartus Prime Lite Edition 17.1 and Mentor Graphics. HDL is essential for FPGA development, as it allows designers to express parallel execution of multiple tasks in a standard, definition perfect way. Advanced Language (HLL) such as C and C ++ is essentially a sequential language.
The HLL compiler acquires the HLL source code to convert it into a long set of enforcement sequences, usually only one instruction can be performed at a time. This is also the reason why FPGA is much faster than the processor - FPGA can perform thousands of tasks simultaneously as long as the FPGA is large enough. There are some HLL compilers to convert C or C ++ to HDL, then process the regular FPGA tool, but the OpenXLR8 design process of Alorium is not included in these HLL compilers.
However, once the HDL and FPGA development tools are designed and debugged, you can be used in Arduino IDs like any other Arduino library block. Currently, Alorium is also developing more XBs for the Arduino IDE library.
Summarize
Arduino and Alorium Technologies realize that the designers have more embedded properties more and more of the designers need more embedded performance. Although the strategies adopted by the two companies are different, the ultimate goal is not two: strive to make more embedded developers more easily using FPGA. On the most basic level, Arduino and Alorium methods make hardware design as simple as selecting blocks and run scripts.
At present, the complete design process is not simple enough. Arduino has not opened a complete FPGA development process to HDL developers. Although Alorium's design processes do include HDL design, it is required to have a knowledge of Verilog or VHSL FPGA design language and tools.
However, these products have opened the door, at least in theory, can use other FPGA development methods such as C and C ++ hardware compilers. At that time, these functions can be added to the Arduino IDE by using the simple way to develop using Alorium Technology and Arduino, and the performance of the FPGA is given to the ARDUINO IDE.
Be
Article source network "
Our other product:
