"Friendly elec's nanopi neo2 is a new generation of ultra small arm computer, smaller than Oreo biscuit and faster than card computer. It adopts a new 64 bit quad core A53 processor H5, built-in six core mail450 GPU, integrated 512M DDR3 memory, and can support the operation of Ubuntu core, armbian and other embedded operating systems. Nanopi neo2 adopts Gigabit Ethernet interface and a standard USB interface, Therefore, it is very suitable for Internet of things applications with high volume requirements, large amount of data transmission, fast data transmission speed and higher computing performance; This paper introduces the characteristics and block diagram of allwinner H5 processor, as well as the main characteristics, block diagram and circuit diagram of nanopi neo2 subminiature arm computer
The Allwinner H5 is a highly cost-efficient quad-core OTT Box processor,which is a part of growing home entertainment products that offer high-performance processing with a high degree of funcTIonal integraTIon.
Overview of allwinner H5 processor features:
• CPU: Quad-core ARM CortexTM-A53 Processor, a power-efficient ARM v8 architecture, it has 64 and 32bit execuTIon states for scalable high performance ,which includes a NEON mulTImedia processing engine.
• Graphics: The hexa-core ARM Mali450 GPU including dual Geometry Processors(GP) and quad Pixel Processors(PP), provides users with superior experience in video playback and mainstream game; OpenGL ES2.0 and OpenVG1.1 standards are supported.
• Video Engine: H5 provides multi-format high-definition video encoder/decoder with dedicated hardware, including H.265 decoder by 4K@30fps , H.264 decoder by 4K@30fps , MPEG1/2/4 decoder by 1080p@60fps , VP8/AVS jizhun decoder by 1080p@60fps , VC1 decoder by 1080p@30fps , H.264 encoder by 1080p@60fps.
• Display Subsystem: Supports DE2.0 for excellent display experience, and two display interfaces for HDMI1.4 and CVBS display.
• Memory Controller: The processor supports many types of external memory devices, including DDR3/DDR3L, NAND Flash(MLC,SLC,TLC,EF),Nor Flash, SD/SDIO/MMC including eMMC up to rev5.1.
• Security System: The processor delivers hardware security features that enable trustzone security system, Digital Rights Management(DRM) ,information encryption/decryption, secure boot, secure JTAG and secure efuse.
• Interfaces: The processor has a broad range of hardware interfaces such as parallel CMOS sensor interface, 10/100/1000Mbps EMAC with FE PHY, USB OTG v2.0 operating at high speed(480Mbps) with PHY, USB Host with PHY and a variety of other popular interfaces(SPI,UART,CIR,TSC,TWI,SCR).
Main features of allwinner H5 processor:
CPU Architecture
Quad-core ARM CortexTM-A53 MPCoreTM Processor
Thumb-2 Technology
Supports NEON Advanced SIMD(Single Instruction Multiple Data)instruction for acceleration of media and signal processing functions
Supports Large Physical Address Extensions(LPAE)
VFPv4 Floating Point Unit
Independent 32KB L1 Instruction cache and 32KB L1 Data cache
Shared 512KB L2-cache
GPU Architecture
Hexa-core ARM Mali450 GPU
Dual Geometry Processors with 32KB L2 cache
Quad Pixel Processors with 128KB L2 cache
Concurrent multi-core processing
3000Mpix/sec and 163Mtri/sec
Full scene over-sampled 4X anti-aliasing engine with no additional bandwidth usage
OpenGL ES 1.1/2.0 and OpenVG 1.1 support
Memory Subsystem
Boot ROM
On chip ROM
Supports secure and non-secure access boot
Supports system boot from the following devices:
- NAND Flash
- SD/TF card
- eMMC
- Nor Flash
Supports system code download through USB OTG
SDRAM
Compatible with JEDEC standard DDR3/DDR3L SDRAM
Supports clock frequency up to 667MHz(DDR3-1333)
32-bit bus width
Up to 3GB address space
Supports 2 chip selects
16 address signal lines and 3 bank signal lines
Supports Memory Dynamic Frequency Scale(MDFS)
Random read or write operation is supported
NAND Flash
Compliant with ONFI 2.3 and Toggle 1.0
Up to 2 flash chips
8-bit data bus width
Up to 64-bit ECC per 1024 bytes
Supports 1024, 2048, 4096, 8192, 16K bytes size per page
Supports SLC/MLC/TLC flash and EF-NAND memory
Supports SDR, ONFI DDR and Toggle DDR NAND
Embedded DMA to do data transfer
Supports data transfer together with normal DMA
SMHC
Up to 3 SD/MMC host controller(SMHC) interfaces
Complies with eMMC standard specification V5.1, SD physical layer specification V3.0, SDIO card specification V3.0
1-bit or 4-bit data bus transfer mode for SD/TF cards up to 50MHz in SDR mode
1-bit or 4-bit data bus transfer mode for connecting to an external Wi-Fi module up to 150MHz in SDR mode and 50MHz in DDR mode
1-bit ,4-bit or 8-bit data bus transfer mode for MMC cards up to 150MHz in SDR mode or 100MHz in DDR mode
Supports block size of 1 to 65535 bytes
Embedded special DMA to do data transfer
Supports hardware CRC generation and error detection
System Peripherals
Timer
2 on-chip Timers with interrupt-based operation
1 watchdog to generate reset signal or interrupt
Two 33-bit Audio/Video Sync(AVS) Counter to synchronize video and audio in the player
High Speed Timer
1 High Speed Timer with 56-bit counter
56-bit counter that can be separated to 24-bit high register and 32-bit low register
Clock source is synchronized with AHB clock, much more accurate than other timers
RTC
Time,calendar
Counters second,minutes,hours,day,week,month and year with leap
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