Core Tip: Not long ago, Xilinx, Inc. (Xilinx: All Programmable technologies and devices businesses) Virtex-7 H580T FPGA- world's first heterogeneous 3D All Programmable chip officially shipped. This article will give you into the details of this section heterogeneous 3D All Programmable chip.
Be
Xilinx Virtex-7 HT using the stacked silicon interconnect (SSI) technology, providing the FPGA industry's highest bandwidth, 28Gbps can provide up to 16 transceivers 72 and 13.1 Gbps transceivers, and also to meet the critical Nx100G 400G line card applications functional requirements of single-chip solution.
To this end, we conducted in-depth discussions on Xilinx some issues, specific questions and the corresponding answers are as follows:
Q: Why 28 Gbps transceiver is the 40nm process, rather than 28nm or 65nm?
A: The advantages of heterogeneous architecture allows us to combine different technologies, which can provide for the needs of children and optimization of customer devices. For H580T on Virtex-7 device, we chose proven transceiver technology has been tested in a 40nm technology node.
Be
Q: Why Virtex-7 HT FPGA called all programmable devices? Or Xilinx 7 series and above all future products are called all programmable?
A: We have not made a formal change in the wording, but "All Programmable" This wording reflects the fact that the word has not fully FPGA fully described in the current programmable device product. Our product has gone beyond the traditional programmable logic, it is no longer a simple gate array. Especially for 28nm technology node, Xilinx developed many different types of programmable technology; and beyond the programmable logic I / O, including ARM software programmable processing system, 3D-IC, analog mixed-signal (AMS) , IC design tools and IP and so on.
These different subsets Xilinx programmable technology integrated into All Programmable devices, such as the Virtex-7 2000T and Virtex-7 H580T SSI devices and the latest delivery Zynq-7000 Extensible Processing Platform (EPP), and also includes tape there are a large number of analog mixed-signal (AMS), high performance SERDES, PLL to the data converter programmable FPGA resources.
Q: Press Release [1], "Xilinx wired communication system architect Mark Gustlin noted: 'Virtex-7 H580T having 8 and 28 Gbps transceivers larger logic capacity, ......'", and the beginning and He referred to: "may be provided up to 16 28 Gbps transceivers." In the end is 8, or 16 28Gbps transceivers?
A: The first paragraph of the press release referred to the entire product line, including a total of three devices: Virtex-7 H290T, Virtex-7 H580T and Virtex-7 H870T. Virtex-7 H870T 28Gbps transceiver 16 using 72 and 13.1 Gbps transceivers, the highest bandwidth product family devices. Two lower bandwidth devices are eight 28Gbps transceiver, but respectively 24 and 48 13.1Gbps transceivers.
Q: How Nx100G and 400G line card market? When will start the development and mass deployment?
A: Xilinx research and development work in this area has been underway for some time.
Communications equipment OEM manufacturers faced with doubling device density, power consumption while ensuring constant pressure to reduce costs. For relatively CFP optical module, the optical module can support the design of CFP2 100-400Gbps generation system, to maximize the bandwidth density panels, without increasing the size and power consumption.
Be
To support higher bandwidth, you need to upgrade SEREDES data rates from 10Gbps to 28Gbps. In the development process of the Xilinx Virtex-7 HT FPGA (including Virtex-7 H290T and Virtex-7 H870T device), a chip-to-optical module to the backplane and the chip-chip interface between the jitter budget very strict, and the power consumption together become the focus of attention.
400Gbps line cards using the customer wishes to join single-chip solution comprising 16 on the input side 28Gbps, 400Gbps of CFP2 4 is connected to the optical module. The system also requires a plurality of connection rate NPU or ASIC 200Gbps or 400Gbps with 48 to 72 10.3125 Gbps transceivers. In addition to the use of 16 28Gbps transceivers Virtex-7 HT, Xilinx devices are also provided 4 or 8 28Gbps transceiver for 100Gbps, 2 x 100Gbps applications. Technology area
The first PLC programming languages, ladder design is critical
Microsemi innovation through strategic acquisitions and continued growth in 2017
Alibaba and Tencent investment programmable chip company Barefoot
Lattice Semiconductor was acquired by foreign operators and FPGA giants but unhappy?
Foreign media: high-pass or $ 15 billion acquisition of Xilinx
Our other product:
