In such a world that has a favorable world, analog technologies are used to deal with the process of adverse to them. But this phenomenon may be changing.
We live in a simulated world, but digital technology has become mainstream technology. Mixed Signal Solution In the past, a large number of simulated data, only a small amount of digital signal processing, which has been migrated into the system application, and an analog-to-digital conversion process is generated in the system.
There are several reasons for the analog techniques, some of which are built on their own defects. Moore's law is suitable for digital circuits instead of analog circuits; transistors can and must do smaller, which facilitates digital circuits. However, this impact on the analog transistors is not large, but the smaller the size of the device, the difference in the simulation device is often worse. The miniaturization of devices has always been the key to this world technology progress. At this point, the simulation technology cannot keep up with the era, gradually being forgotten.
Process technology has been optimized for digitization, which is not surprising, but this has caused increasing pressure on the remaining simulation components. The changes in manufacturing process and parameters degeneration in the product life cycle are more challenging in the simulation world. This means that analog components require more analysis and clever design than digital components.
The simulation technology is still considered an art, and automated does not migrate in digitally to tools, which means that the simulation productivity will continue to decline. We are discovering in the chip, even if the expected simulation content is also part of the SOC surface area, and the design of the analog device takes a long time, but also to take risks.
Ironically, as digital equipment is getting smaller and smaller, the chip is getting bigger and bigger, and several aspects of SOC design begin to seem to be simulated. Clock and power distribution are rapidly become analog problems. The chip relies on the PHY circuit to move the data around the system, which is the characteristics of analog circuit.
For chips that cannot be compatible with the analog content (substantially all chips), the above aspects are just why Moore's law cannot achieve part of the chip size, power, performance improvement, lack of attention to analog signals and devices, This is why the digital chip is currently paying.
Craft technology
There are signs that this situation may change with the slowdown of Moore's law. Synopsys TCAD Product Marketing Manager Ric Borges said: "Creating process design has three important aspects of their own attention. The cost is very important, and must be equilibrated with performance, power characteristics, and reliability, some such as cars and medical care. The application, which is very strict in terms of reliability, and other applications are not so strict. "
Borges pointed out that there are many simulated processes to use larger functional dimensions. "Many people are still manufactured in 180 and 130 nm. In this baseline, there may be derivatives to solve different power or voltage levels."
It may take different ways to solve the problem. "The size of the high voltage transistor is often not well optimized." Mathieu Sureau, director of Integrated Circuit Engineering, MicroSemi said: "In some cases, the foundry may only provide a higher given voltage breakdown than what we need. This makes us face two options - do not do any changes, we will face size losses; or develop our own devices, but this is not the best solution, because we need to verify its reliability. "
Mixed signals typically have to use more modern processes to obtain the necessary digital density. Tom Ferry, Vice President of Synopsys Product Marketing, said: "We started to see the process technology companies use a number 28nm process and create a derivative product. These are specific designs with more simulated or power content than traditional 28nm technology."
Analog design rules may contain additional complexity. Miller pointed out: "In the focus digitized process node, design rules mainly guarantee manufacturability and production. In simulation technology, other design rules are usually used to capture many 'simulated effect', such as good neighboring effects (Proximity) Effects, stress effect (due to STI, etc.) effect. They may result in transistor size greater than minimum size, for precise or matching areas. In other words, simulation technology usually simulates more advanced nodes The process of large feature sizes further reduces the advantages of process scaling of the simulation module. "
But there are some problems, some people have seen the opportunity. Sureau pointed out: "Guarding / Latchup Guidelines / PDK rules are often very poorly or do not exist for many devices. This provides the design team to get advantageous space, or at least different from other teams, the key is how they optimize Mode overcome these issues. "
Competitive pattern
As we migrate to FinFET, the digital circuit is again favored. "It is very difficult to design the PLL for 7nm FinFET digital design." Ferry said "The simulation design is difficult. FinFet is mainly used for digitization."
Miller confirmed that "FinFet is not very friendly. Designers are limited to small devices, and the interconnective registration effect is often more difficult, but also need to consider more effects related to layout, must implement good equipment Match. "
As the car is a large number of semiconductor consumers, there may be good news in the future. "Through TCAD, Process Design Companies can understand their work effects on PLLs and other simulation parts." Ferry said: "With the simulation content of the chip into the automotive market, more and more important, because they The market is getting bigger and bigger, so we will have more types. Today, the chip design is more than five years ago. This makes them worth investing more money in order to get more business. We need to balance this Guo Chen To meet the number and simulation requirements of integrated components. "
A large amount of analog chip is required, including components such as sensors, power management, integrated MEMS, and imaging applications, and is not urgent to obtain the latest nodes supported by digital support. Many of these components need to interact with high voltage, very sensitive to noise, and benefit from special device types and isolation techniques that cannot be obtained during standard logic. Miller said: "This has led to the rise of" Super Mole "process nodes specializing in simulation capabilities. These technologies are new craft style, but applied to larger feature sizes (up to 180 nm!), And support bipolar transistors, high pressure DMOS devices (some devices can process more than 100V!), As well as buried and other isolation strategies, allowing high precision simulation to coexist with noisy numbers. When the simulation is a key demand for design, we see many customers choose these processes. "
Outline
Design techniques have been developed to help analog circuit overcome some of them. Examples include post-calibration and digital assistance of analog circuits to dynamically adjust. These are not free. An example of digital compensation is the pipeline ADC. This has a delay in calculating overhead and numbers, meaning that compensation is slower, and the total power consumption is added.
There may also have compromise in the technical node. "For mixed signal design, the digital content is huge, but this is not enough to prove the rationality of finfet, we see a large number of design for 65nm is a nice intermediate position." Miller said: "For some RF functions This is especially true, for example, for the design of the IoT edge equipment market. "
Reliability
Aging models have been developed based on digital circuitry, and in the life cycle, there are not much attention to the simulation / RF reliability. This may become a bigger problem for automotive and medical applications that must ensure product life. Many analog circuits are dependent on matching, which means that other issues will occur if the degree of aging and methods of two components are not similar. This can lead to more frequent recalibration, or may result in more complex design. If the device cannot be reconnected to the tester, it is also possible to mean that the chip or system requires additional complexity.
Smaller geometry has more variability. "Since we can simulate manufacturing technology with a lot of details, we can inject variability in the manufacturing process", "Borges said:" With the expansion of scale, this trend is becoming more important. Usually, These effects becomes more important for digital-related simulation applications, such as device matching. The process of careful design is required to achieve some functions. "
It must be noted that there is no need to produce too many pessimistic emotions on these models. "It is important to maintain the source of related variation, because in fact, some variability sources may cancel each other to some extent." He said.
Conclusion
The industry's long-term concern has caused the simulation technology to extrud the circle as much as possible, but the simulation is always necessary. Today, when the simulation content is important, the answer to this question is, staying on a large node, but the additional effort of the foundry may produce some better compromise, allowing numbers and simulations to integrate without Unfair prejudice. Cars may be the industry that promotes this trend.
Original link: https://www.eeboard.com/news/monijishu/
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