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    (Kirle Nafu) get universities, experts, uniformly recognized small feet FPGA development boards, what is the gods?- small feet Step-mxo2 second generation evaluation

     

    "Background As the main force of embedded system design, microcontroller has been widely used in all walks of life. However, with the advent of a series of emerging concept products such as Internet of things, intelligent hardware and VR, the market products have an obvious trend of diversification and richer functions, which also puts forward new challenges to engineers in embedded product design. For example, although today's microcontroller product series are more thoroughly differentiated and have relevant MCU product support for each level of fields, it also means that the selection of devices and resource evaluation need to be more cautious. The selection of traditional MCU development platform is a difficult problem. For the principle of paying attention to the application is enough, selecting microcontrollers with powerful performance and rich functions wastes resources The cost is wasted. The low-end entry-level microcontroller may have problems such as unsupported functions and insufficient IO ports. In addition, different platforms have different development environments and processes to be familiar with, which greatly prolongs the time of engineers in project development; In another FPGA field that was relatively small in the past, with the progress of technology and the continuous development of EDA design tools, the integration of FPGA is getting higher and higher, while the corresponding power consumption and cost are decreasing, and the threshold of FPGA (learning cost and price cost) is getting lower and lower, which also makes it widely used in various fields, More and more embedded system designs directly adopt FPGA design, or use FPGA products as the expansion of system functions. In short, FPGA appears more and more in the current embedded system design. Xiaojiaoya step-mxo2 second generation As the FPGA market, which is still small but has optimistic market prospects, many well-known manufacturers have launched various FPGA development platforms that seem to have powerful functions but have poor actual experience effects. At the same time, some domestic manufacturers have made new ideas and launched some exquisite FPGA development boards, which seem to have little functions and poor playability, but in essence, they have rich interfaces, Flexible and easy to use, it can be used not only as an introduction to FPGA, but also for project development. For example, the little foot strp-mxo2 second generation FPGA development board obtained by the author. Xiaojiaoya FPGA development board is based on lattice's MXo2 FPGA series. Speaking of this development board, it also has a story of "past life and present life". To make complaints about it, we can see that the picture is the two generation of the product. Actually, there is a generation of products before that. It was also crowd financing at the time. Many users would share the posts. Many of them had little logic resources for developing FPGA boards, and there was no onboard Downloader on the generation. It only provides an additional Downloader, which is not convenient to use and carry. The original exquisite and impressive board did not impress people much for this or that reason. However, it is precisely because of the problems exposed in the first generation. After the trial of many engineers and the baptism of the market, the second generation of xiaojiaoya step-mxo2 feels reborn, The problem of being left out of the generation and make complaints about the two generation has been greatly improved, and many of the peripherals have been added. Compared with the first generation, the packaging of the second generation has been changed from plastic boxes to paper packaging boxes. Maybe everyone has different views. In the author's opinion, if you use the cheap plastic boxes of the first generation, you'd better use the current one. It's not only environmentally friendly, but also the extra cost can be spent on the paperboard. However, the box itself is worth tucking away, and it can not be said for what reason, but it doesn't make complaints about a development board. The information of xiaojiaoya company, including telephone number and address, is printed on the back of the packing box. If you need it, you can call directly. It's often convenient. A two-dimensional code on the back is confusing and doesn't make any explanation. In line with the principle that I don't go to hell, who goes to hell, I'd better take practical actions to directly scan and see the results. It turns out that it's the public account of xiaojiaoya FPGA development board. Let alone, it's really necessary to pay attention to this public account if you want to learn this development board. It contains tutorials on quick start and high-quality routines, so that you can take time to learn on the mobile terminal, Xueba is necessary. Expand the packing box to see the information about the xiaojiaoya FPGA development board, the tutorial link and the signal definition of the xiaojiaoya board card extension IO port pin, which makes it very convenient for engineers to have a preliminary understanding of the xiaojiaoya development board and what it can do. In fact, although the author has disclosed that xiaojiaoya II has added onboard downloaders and some functional peripherals, it is undeniable that the second generation has maintained the figure of the first generation while meeting the above conditions. The board size is 52mm x 18mm, which is still small and exquisite. Onboard peripheral resources: 1 channel micro USB interface 2-bit 7-segment nixie tube; 2 RGB three color LEDs; 4-way dial switch; 4-way keys; 8-way user LED; 36 user scalable I / O (including one SPI hard core interface and one I2C hard core interface) Integrated ft232 programmer It can be seen from the above figure that xiaojiaoya II is an ultra compact 40pin dip FPGA development board. Its core FPGA chip is the 4000hc product of MXo2 series of lattice company. Compared with the FPGA chip MXo2 1200hc series of xiaojiaoya I, the FPGA chip resources of xiaojiaoya II are nearly four times higher. At the same time, ft232 programmer and keys are integrated on the board Dial switch, nixie tube, led and other peripheral resources. In addition, the second generation of xiaojiaoya has also expanded 36 FPGA IO interfaces, which are led out through 2.54mm through-hole pads, which can be used together with bread board and can be flexibly embedded into other embedded system designs. Of course, the most positive thing is that the second generation on-board ft232 chip can realize on-board programming without an external programmer like the first generation, which is not only convenient, but also greatly improves the flexibility. On the one hand, the improvement of the functions of the second generation on-board peripherals benefits from the improvement of the design. On the other hand, the on-board 4000hc FPGA chip of MXo2 series of lattice company is indispensable. More resources also enrich the on-board functions. Core devices: Lattice LCMXO2-4000HC-4MG132 4320 LUT (lookup table) resources; 96Kbit User Flash,92Kbit RAM; 2 + 2-way PLL + DLL; Embedded function block (hard core): one SPI, one timer and two I2C Support DDR / DDR2 / lpddr memory; Power on instantaneous start, start time < 1ms; From the specifications of the FPGA chip on the second generation board, compared with the mxo2-12000 on the first generation, the main improvement lies in LUT resources, user flash and ram. In addition, the second generation also has a PLL. From this point of view, the improvement of the second generation products mainly lies in resources, This also allows engineers to choose the first or second generation products as the development platform suitable for their own projects. Of course, if you want to get started and learn FPGA, the author still recommends the second generation. After all, there are more peripheral functions and on-board programmers, which is more convenient for beginners to learn. (click the picture to enlarge the original picture) development environment Each FPGA manufacturer has its own EDA tools. Those who use programmable devices know the importance of FPGA EDA tools, so the ease of use of EDA tools may also affect the engineers' attitude towards the company's FPGA products. Lattice's own EDA tool is diamond, which supports windows 32-bit, 64 bit and Linux 32-bit and 64 bit system versions. It is optional. Engineers can choose the platform they are good at. Diamond can be downloaded from lattice's official website, which is very convenient, and the installation package of diamond is much smaller than that of Xilinx or Altera( Diamond installation package (download address) The installation process of diamond is also very simple. You only need to follow the default prompt to go all the way to next. However, during the installation process, you need to pay attention to the selection of activation mode. As shown in the figure below, select node lock license, and lincense can be obtained free of charge through the official website. After the installation of diamond, copy the license obtained from the official website for free to the license folder of the diamond installation directory, set the environment variable to the correct address, and then open the diamond tool. If it is the first time to contact FPGA and xiaojiaoya's development environment, some users will always feel that EDA tool installation will be a troublesome thing. Xiaojiaoya's team may have considered this situation early, so it directly printed a detailed software installation tutorial on the packaging box, which is very considerate. The following figure shows the interface of diamond tool, which looks very simple. On the right side of the software window, there are a large number of document links such as user guides, reference guides, tutorials, FPGA design guide and so on, which are very instructive. Power on start The xiaojiaoya second generation development board is powered on through the microusb interface. A demo demo has been preloaded on the development board when it leaves the factory. After power on, you can directly see the running state of the demo. As can be seen from the figure below, the peripheral functions that can be displayed on the second generation, such as nixie tube, RGB LED and LED lamp, are displayed in the preset factory procedures. Xiaojiaoya second generation board is programmed through the onboard ftdi ft232 USB to serial port chip (see the figure below). Generally, diamond can automatically identify the programming module after it is installed. If the driver cannot be installed automatically, you need to download the driver first and download the driver version (driver download address) according to different systems. To understand the development process of the second generation of xiaojiaoya, a new file -- > New -- > project is created Create a new LED flashing routine to demonstrate this routine. The reason is that it has been provided on the small foot generation. We just need to modify the pin configuration and use it directly. Add relevant design files or constraint files. Here, the author directly creates a new project, so you don't need to add them, just next Select the corresponding device model, just like the FPGA chip (lcmxo2-4000hc-4mg132) on your little foot second generation Click Next and select the comprehensive tool. Synplify pro (third party) and lattice LSE (original factory) can be used. The original lattice LSE is used here. Finally, the project information you set up before will appear. All the previously selected information is here. Confirm that it is correct and click finish. The following figure shows the whole project interface of the newly created diamond. After the project is completed, you need to add design files. Click file -- > New -- > file Select Verilog files, name or fill in the previously named led, and then new. Here, the program of xiaojiaoya generation 1 is directly applied. Of course, if you look carefully, there are some places that need to be modified. For example, xiaojiaoya generation 1 only has two LEDs on board, so only the two LEDs flash alternately, but xiaojiaoya generation 2 has 8 LEDs. Of course, if you directly apply the program of generation 1, the alternating flashing of two LEDs can also be realized; In addition, the first generation of xiaojiaoya uses an external 25MHz crystal oscillator, while the second generation is an 8MHz crystal oscillator used together with ftdi f232 programmer chip. Some details may need to be actually started in order to feel better. Here, we will not change, but talk about the whole design process directly. After completing the code design, select the process bar on the left and double-click synthesis design to synthesize the design. After the synthesis is completed, synthesis design displays a green check mark, as shown in the figure After the synthesis, you need to assign pins to the FPGA, select tools → spreadsheet view, and the interface is as follows It must be changed here. You can no longer directly apply the configuration of xiaojiaoya generation 1, because there are many resources of the second generation, and the pin definitions have changed accordingly. For pin configuration, you can refer to the packaging box of xiaojiaoya generation 2. It is very effective and convenient to use in practice. Because only two LEDs are involved in the code of the applied xiaojiaoya generation 1, only two LED pins are allocated here. In addition, the IO port type is set to lvcmos33. Save after completion, select process, check all options, and double-click export files directly. All layout and wiring outputs are completed in turn. After completion, all options are checked in green. Here, the generation of the first program stream file is completed, and then it can be downloaded to FPGA through programmer. Of course, first of all, select the correct Downloader, the ftdi chip used here. To be honest, the download process is still a little slow. Fortunately, it can be endured. After the download is successful, the corresponding pass status prompt will be displayed. The question is, what the hell is this program? Is something wrong? Except that LED1 and LED2 flash alternately, all other LEDs are on. Looking back at the data of xiaojiaoya II, it is found that the original circuit design of xiaojiaoya II is that the LED will light up in the low-level state. It should be because the other IO pins of FPGA chip are pulled low in the system initialization process during program design. If you know what the problem is, it is not a problem to make corresponding changes. Of course, this is only an entry-level LED flashing program. Here, we only go through the whole process of engineering development. For complex engineering development, pre simulation and post simulation are required to ensure that the final programming logic and timing meet our design requirements. Diamond also comes with active HDL simulation software. If you are interested in this part, you can refer to the engineering simulation example of xiaojiaoya generation 1 in the love board forum. This article will not be repeated. Summary After reading xiaojiaoya II, you will marvel at its compact and exquisite appearance and the convenience of using it when you open the box and power on. Of course, you may also feel that the peripherals of xiaojiaoya II are not enough for FPGA development boards with various functions on the market, but if you change your thinking, consider the cost of the development platform and the practicability of the development platform in the future, Xiaojiaoya FPGA can meet your needs at many different levels, such as stacking dip40 standard modules of the same size; Or as an independent function module, it is used on the motherboard to add various peripheral functions; It can also be inserted directly in the experiment

     

     

     

     

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