"DC / DC switching voltage converter is able to spread, the key lies in its effective regulation over a wide range of input voltage and output current than linear regulators. However, at low load conditions, the converter itself IC when quiescent current system will become the main reason for the loss of its efficiency advantage also vanished.
Now, the power element leading manufacturers have introduced a series of "dual-mode" switch-mode converter. To enhance the efficiency at low load conditions, these converters can be reached when the preset current threshold, the handover method to automatically adjust the pulse frequency modulation (PFM) method from the conventional pulse width modulation (PWM).
This article describes the PFM works and explain its advantages and some disadvantages, and then look at how a number of chip suppliers implement this technology in integrated power chip.
PWM and PFM
It is not the only technique for adjusting the PWM switching converter output voltage. This technique is not adjusted by changing the duty cycle of the fixed frequency square wave power output, instead of using a constant duty cycle, then the frequency modulation wave ways to achieve adjustment. Using a constant turn-on and off time control mode of DC / DC voltage converter is a typical example of architecture PFM.
Another example is the so-called PFM hysteresis voltage converter. This converter uses a simple method for adjusting the MOSFET can detect changes in output voltage is turned on and off according to the converter. This architecture allows the output voltage swing around the set point to a continuous, and therefore referred to as "ripple regulator" or "double hysteresis controller." Hysteresis for maintaining the intended operation, switch avoid jitter. Since the driving signal will change lag architecture MOSFET according to the operation of the circuit, the switching frequency is changed.
PFM architecture DC / DC converter aspect does have certain advantages, including better low power conversion efficiency, lower overall cost and simple solution converter topologies, this architecture does not require control loop compensation network, However, due to some obvious deficiencies without PWM and popular.
First, EMI control. Wide operating frequency range with respect to the device, a filter circuit of a fixed switching frequency converter is easier to design. Second, at the output of the PFM architecture easily result in a greater ripple voltage, which causes problems for sensitive powered silicon device. Third, low (or even zero frequency) of the PFM switching converter will increase the transient response time, resulting in slow response to some portable applications, lead to customer dissatisfaction.
However, the advantages of the advantages of PWM device PEM single wafer architecture "dual mode" switching converter in combination, the manufacturer can provide an efficient solution for our entire operating range. EMI issues related to PFM has been greatly eased, the root causes of such interference are fast switching at high current and high voltage conditions, on the contrary, the dual-mode chip, only in low current and low voltage inverter runtime will run.
Energy losses in the switching regulator
The most common technique is the use of surge switching device oscillator and PWM controller generates a square wave pulse, which is typically several square wave will follow a set of frequencies within the range of hundreds of MHz, the interior of the device MOSFET (or synchronous device the MOSFET) switching operation. (Without considering the more serious electromagnetic interference [EMI], permits use of a smaller volume of the magnetic element.) The output voltage of the regulator duty cycle of the PWM waveform is proportional.
This technique works well under normal circumstances, but when the low-frequency efficiency. To understand the reason, it is necessary to consider where the loss occurs, i.e., the input of the regulator draws energy not delivered to the output terminal.
Switching regulator has four sources of loss. First, the MOSFET gate capacitance is the dynamic energy loss caused by charge and discharge, which is the maximum loss during high-frequency operation of the transistor. And switching losses occur when the pressure differential on that channel significant current flows through the drain-source channels. When the near-zero flow channel resistance of the high current power switching element, the other MOSFET losses occur. (This is the power device manufacturers strive to reduce Cause "on-resistance" of the product.)
In addition to the switching element, the switching regulator circuit passives inefficiency arises easily. Inductor comprises a conductive losses (winding) losses and core losses. Typically the capacitor equivalent series resistance loss element (ESR) related to the size of the device by a capacitor, the load current is determined and the operating frequency.
There are two switching regulators implemented method. Engineers discrete components can be built from scratch in a switching regulator, or in a variety of converter IC Texas Instruments, Linear Technology and Fairchild Semiconductor major semiconductor vendors in their choice as a power source, then construct a switching regulator. Advantage modules simplify their design process.
However, the converter IC itself increase the total loss of the switching regulator. For example, some of the energy required to provide internal bias current amplifiers, comparators and the reference, but the internal oscillator and driver circuit losses primarily related to the PWM controller IC. Relatively speaking, such losses at a high load driving switching regulator is not obvious, but as the load decreases, and the switching operation associated with an external passive components reduces losses, losses associated with the converter is not maintained Change.
This sometimes makes portable product designers a dilemma. Under pressure engineers will find ways to control the battery budget, the selection of a high efficiency switching regulator (e.g., compared to a linear regulator) it seems to be a too obvious choice. (See "Design of a lithium ion battery to extend the life time" in TechZone) However, at low power portable "standby" or "sleep" mode for a long time, wherein the request switch of the converter is relatively mild, and operating efficiency of the switching regulator is relatively poor.
Typical handheld device running at full current consumption is about 1 ampere, but in the standby or sleep mode is less than 1 mA. Up to a few milliamps of current is consumed when taking into account the need to convert IC to keep running, low conversion efficiency at low load conditions be a bit surprised, because the total load current regulator in a large part is the quiescent current .
Promotes Energy Efficiency
In order to solve the main problem of losses (i.e. losses associated with the internal oscillator of the PWM controller and the driving circuit), the designer can select one of the plurality of dual mode switching converter in the market. These devices are a combination of normal PWM operation function PFM technology (operating in PWM mode, a variable frequency technique is usually much lower than the fixed frequency)
Dual mode until the switching converter operating in current between the high, enters a continuous conduction mode (and therefore, the current in the inductor never falls to zero). When the load current decreases, the converter switches to discontinuous mode (when the current in the inductor falls to zero due to the light load does). Very light load, the converter enters the PFM (manufacturer sometimes referred to as "power saving mode [PSM]"). Other vendors through a complete stop advantage oscillator frequency will run to the limit (usually referred to as "pulse-skipping").
It should be noted that the use does not indicate a low load PFM switching converters use PFM architecture, but the use of PFM operation function can be utilized when required PWM architecture.
Under light load conditions, the output capacitor of the switching converter to maintain the output voltage within a time interval of the switching pulse. Ideally, the oscillator can be fully closed at no load, and the output voltage due to the full state of the output capacitor will remain constant. However, the parasitic losses of the capacitor consumes electric power, and requires a power switch circuit having at least occasional pulses to maintain regulation of the output adjustment process.
During operation when the PFM, the output power is proportional to the average frequency of the pulse train, and the output voltage is lower than the output voltage is set by the feedback control loop is measured, the converter starts to work. Then, the switching frequency of the converter continues to rise until the output voltage reaches the set voltage and the output voltage is higher than the set output 0.8 - within a determined voltage range of 1.5% (Figure 1).
The negative impact of PFM operation
Since the need for a tolerance band (non-fixed point) is detected when the power switch is turned on again, it can often be observed when the switching converter is switched to the PFM mode to increase the output voltage ripple. The use of a narrow tolerance band, the switching frequency of the converter will increase, resulting in reduced power capacity. Engineers must improve energy efficiency and improve low load balance point between the output voltage ripple. And differences are shown voltage ripple and the switching operation of the PWM converter in PFM mode of FIG. 2a 2b.
During the load transition, any switching converter will appear some degree of overshoot transition at a high load to the low load, or when the undershoot occurs transition from low load to high load. Converter operating in PSM mode, the load level is very low, so the next transition is the transition from the low load current to a high current (typically corresponding to a transition from sleep to active mode). Regulator output load lifting often result in continued, "the output voltage stuck" until the conversion circuit has its time to respond.
Some switching converter with a voltage such measures will minimize the trap. TI's TPS62400 a "dynamic voltage positioning" feature. During PSM operation, the output voltage set point will improve slightly (eg, to enhance 1%), it is expected to consider the real-time voltage that occurs when a sudden increase in load instantly drop. This prevents the output voltage drops when the load is initially adjusted to a desired transition window less.
Some devices also have enhanced features, may be used to compromise made between (the best mode PSM) (optimal PWM mode) good transient response and low power consumption balance. This enhancement is a batch mode, the engineer may have a better transient response than the PSM, to achieve higher energy efficiency PWM converter IC using I²C instruction. For high load to the system from the sleep mode or the like as the conversion of a light load, such intermediate model is a good choice.
Business chip PFM
PFM can run at low loads IC quiescent current to a few μA from a few mA. Figure 3 shows a light load PSM power conversion efficiency as compared to TPS62400 switching converter operating in PWM mode.
3 shows that, although the above PWM mode of 100 mA to maintain good energy efficiency, but can use the PSM 80 to improve efficiency in the case where the load current is less than 1 mA - 90%. If the converter is operated in a PWM mode during light load so that the operating current will be significantly higher current load, resulting in very poor conversion efficiency (much lower than 30%).
Analog Devices using a variety of switching converters PSM. When this mode is entered, due to the offset level PWM regulator output voltage continues to rise until it reaches a value higher than the 1.5% level PWM regulator, at which point, PWM operation is stopped: two power switches are turned off and enters the no-load mode. Before VOUT falls PWM regulator value, allowing the capacitor to discharge. Then, the converter drives the inductor, so that VOUT rises again to the upper threshold. PSM long load current is below the current threshold, the process repeats.
The company uses the PSM TPS7A8300 regulator, to the input voltage at 2.3 V and 10 mA output current conditions, the efficiency improvement from 40% to 75%. The chip is a buck converter 3 MHz, can use at up to 600 mA of current of 2.3 - 5.5 V 3.3 V input provides an output. PSM is a PWM conversion occurs and the point 4 illustrated in FIG.
Other manufacturers also provide power element dual mode switching converter. Linear Technology offers LTC3412A device, which can improve the efficiency with low load conditions in "burst mode" pulse-skipping operation and function. The chip is a buck converter, a current can be up to 2.25 to 3 A - 5.5 V input up to 0.8 - 5 V output.
Burst mode is an example of intermediate PFM technique introduced above, can enhance efficiency while maintaining a reasonable transient response capability. For example: the burst mode by the embodiment, the efficiency at 10 mA output current (VIN 3.3 V, VOUT 2.5 V) from 30% up to 90%. LTC3412A further includes a conventional pulse skipping mode of operation, can further reduce the switching losses at light loads.
Extend battery life
When designers need to extend battery life in portable devices, PWM control of switching converters is a popular choice. However, it should be borne in mind, many portable products in most of the time in a low-power sleep mode, but only in the smallest state in energy efficiency work point converter. Although milder battery requirements, but adding together the current time, the battery life will be shortened.
By using architecture with PWM, but when the load is below a certain threshold can still achieve technical advantages of PSM and PFM converters, designers can obtain PWM advantage during normal operation, while at the same time in many portable device is in an idle state, and battery capacity can be maintained for a long time.
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