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    Quality certification of silicon carbide product level

     

    "Quality certification of silicon carbide product level" 1. Test beyond the current standard according to the actual application conditions Discrete devices and modules are routinely tested according to relevant standards, including HTRB, h3trb and HTGS. These tests are essential for the release of technology, and the results are recorded in the PQR (product qualification report) on the home page of each product. In order to ensure the operational reliability of Infineon's new coolsic MOSFET beyond these standards, all standard tests shall be carried out for at least 3000h at a time to test the reliability of Infineon's new technology when it far exceeds the necessary standard conditions. The EOL mechanism of the system was not found in any of these tests, which indicates that Infineon's coolsic MOSFET has high reliability. In recent years, many applications begin to require devices to have humidity stability beyond standard h3trb conditions. Chip level measures must be taken to prevent the degradation of power devices due to humidity, and experiments must be designed to accelerate the verification of the effectiveness of these measures. Different degradation mechanisms under these conditions, such as metal corrosion or dendritic growth, can be seen in IGBT modules. In the standard h3trb quality certification test, the basis is to ensure that the device can not be affected by these failure mechanisms under the conditions of T = 85 ° C, Rh = 85% and VDS = 80V. As mentioned earlier, these test conditions are not sufficient to ensure that all applications remain reliable over the long term. If extreme conditions are found when analyzing the application conditions, additional tests must be carried out. Nowadays, humidity test (hv-h3trb) is carried out at the maximum drain source voltage of 80% to ensure that the device can operate reliably for a long time. For IGBT modules, the literature indicates that 1000h of these tests is sufficient to ensure a service life of 25 years. Because the terminal size of SiC devices becomes smaller - because the blocking ability of materials is stronger, it is necessary to use sufficiently reliable special passivation technologies, which can not only withstand the extreme conditions used in these tests, but also operate normally in practical applications. In order to prove that Infineon's SiC chip has reliable performance in the whole life cycle, h3trb and hv-h3trb were carried out during the quality certification of Infineon's coolsic MOSFET. No degradation mechanism was found either in h3trb or in the more challenging hv-h3trb test. For example, the I-V curves before and after the hv-h3trb test are shown in Figure 24. The increase of leakage current shall not exceed 1uA. This can also be seen in the leakage current monitoring shown on the right side of figure 24, which is usually used as an indicator of the beginning of degradation. Since the leakage current does not increase with stress, the device obviously shows no sign of degradation under stress. In order to find out the potential new failure mechanism of Infineon SiC devices, a large statistical sample composed of 300 chips was used for a test up to 3000h, in which no systematic EOL mechanism was found. If calculated with the data of Si chip, there will be more than 75 years of safe on-site operation time. In addition, we also examined our devices under pulsed high-pressure humidity conditions (phv-h3trb or dynamic HTRB), and found no signs of degradation. Because hv-h3trb uses a higher fixed voltage, it is considered a more rigorous test, so phv-h3trb is not necessary before product release. Figure 24. The left figure shows the leakage current before (blue) and after (green) stress application. The figure on the right shows the measured leakage current during stress application. Table 1 summarizes all long-term reliability tests conducted by Infineon on power modules containing SiC MOSFETs. By conducting these tests over a longer period of time, Infineon has proved that our new coolsic MOSFET has not been triggered to an unknown failure mode under the test conditions shown in Table 1. In order to ensure reliable operation under site conditions, the verified stress time combined with strict pass / failure criteria is sufficient to meet the requirements. For reliability tests using discrete devices, high operating temperatures or molding compounds may have an additional impact on the long-term stability of the device under stress. Therefore, many stress tests beyond standard conditions (such as JEDEC or AEC guidelines) were carried out. In particular, dynamic stress tests are important because they may trigger failure mechanisms that are not observed in static tests that follow the standard. For example, the HTRB that applies negative gate source voltage stress to the gate oxide layer, or the high DV / dt test that applies stress to the terminal, fails to show any significant impact on the device performance after the stress is applied. The test results show that coolsic MOSFET technology has good tolerance to temperature, voltage, humidity and dynamic stress. Table 2 below summarizes the tests carried out on coolsic MOSFET in to247 package. Table 2. Reliability test of 1200V coolsic MOSFET encapsulated in to247. No end of life failure mechanism of the system was found in all tests. 2. Ac-htc test method According to reports in the literature, SiC devices even have additional failure mechanisms that cannot be triggered by (Extended) standard tests. They are related to the special material properties and specific application conditions of SiC. Figure 25. System stress conditions for ac-htc test cycle. Compared with the standard test under the condition of TA = 85 ° C / Rh = 85%, the ac-htc test is to prevent condensation on the actual chip surface, and trigger additional application related failure modes by forming a condensate layer in the terminal grounding area. According to the reports in the literature, these failure modes are of great significance for SiC devices. Infineon SiC devices can resist this new material related failure mode. This can be proved by conducting and successfully passing the ac-htc test (AC humidity and temperature cycle), which is developed in close cooperation with application experts and can simulate the operation mode of photovoltaic system application. The stress conditions of the system are shown in Figure 25. The test cycle lasting several hours can be divided into two different stages: a) TA < 0 ° C: low temperature and high humidity lead to condensate on the chip surface and high humidity in the module. In order to prevent self heating from drying the condensate, no voltage is applied at this stage. b) TA > 0 ° C: when the temperature rises to a maximum of 85 ° C, open the device under stress at a higher frequency and voltage similar to that used in practical application. If the passivation treatment of the terminal area is not sufficient, the terminal will degrade, resulting in premature failure during the test and practical application. All SiC devices in the module are therefore equipped with a new laminated passive film to protect the device surface under these harsh conditions and successfully pass the ac-htc test for 120 days without any obvious degradation. In short, for Infineon's SiC diodes, when the passivation treatment, terminal concept and failure rate are equivalent to that of Si technology, long-term hv-h3trb and ac-htc test results and many years of field experience can prove that our coolsic MOSFET is also a reliable device under high humidity and harsh field environment conditions. 3. Second power cycle test When calculating the expected service life of semiconductor devices in practical applications, the aging of internal connection technology must be considered. This needs to be evaluated by a second power cycle test, in which the device is actively heated to change the temperature Δ T is large, and the welding and / or bonding connection can be changed until RDS (on) or rth (J-C) reaches the predetermined change, that is, the so-called end of life (EOL) standard. Based on a recognized model, these results can be associated with application conditions, as described in Infineon application instructions, using Si devices. In principle, SiC module also goes through this process. However, because SiC has a larger Young's modulus than Si, the SiC chip located in the power module will induce a greater amount of plastic strain in the solder joint during the temperature cycle. Therefore, in the aging mechanism of SiC chips welded in the module, the degradation of bonding connection has no great impact, and the biggest impact is the degradation of welding layer, which will increase RTH. It is for this reason that the second power cycle capability of SiC is lower than that of Si using the same interconnection technology. The power cycle curve (available from your local Infineon application engineering team) takes into account the aging mechanism of this change, so that according to the maximum junction temperature TVJ and temperature change as explained in the power cycle application instructions Δ T to calculate the expected service life. In order to estimate the complete application conditions, the relationship between aging and load pulse duration ton must also be considered. This relationship is discussed in our recently published article, which shows that our SiC devices can use the same calculation model as Si. The relationship between the cycle up to the end of life and the duration of the load pulse is also shown in Fig. 26. Figure 26. N cycle timeout of CIPS model (Orange) when the reference on time ton = 1.5s and the correlation factor of adaptive saturated model (blue). The value represented by the dot is calculated and should only be used for reference. The interconnection technology and production lines used in all SiC technologies are the same as Infineon Si IGBT and diode, which have accumulated decades of experience in controlling these processes and module assembly. Another advantage of Infineon coolsic MOSFET technology is that we can use the bulk diode of coolsic MOSFET in synchronous rectification mode without using additional reverse parallel diodes. This can create applications with the following advantages: the device transmits current in two directions, and the chip can generate power in the positive and negative conduction stages of a load cycle, so that the temperature change of each chip is reduced compared with that when using Si IGBT and diode. For applications that need more cycles in the power cycle before the end of life, Infineon has also improved the interconnection technology of discrete devices, such as diffusion welding, which, if used in the future, will enable our coolsic MOSFET to be used in other applications. The research on power cycle of discrete devices is still in its infancy. Therefore, Infineon has conducted more in-depth research in recent years to understand the failure mechanism during power cycle stress. An important discovery is that, unlike power modules, disconnection is the main failure mode in discrete devices as long as the bare chip connection is completed by the traditional welding method. In order to mathematically describe the relevant parameters of degradation, a formula similar to that used in power module is obtained. Regardless of the chip technology (Si IGBT or SiC MOSFET), discrete devices can be described by the same formula. Many device characteristics have an impact on power cycle stability, so no parameter set can describe all products in general. Depending on the device characteristics, it may be necessary to use a separate parameter set. If you want to know the power cycle capability of a device, please apply to your local Infineon application engineer, who can help you evaluate the expected service life. SiC MOSFET has a wide range of applications, including electric vehicle charging station, solar inverter or motor drive. Most applications can be simplified into basic topologies that help determine long-term application trials. The following table lists the main basic topologies. ▼ basic topology overview The main focus is on hard switching configurations because they are usually the most demanding power semiconductors. Infineon has developed a number of test stands that can apply stress to SiC MOSFETs with each of the above configurations. These test stands enable us to run under the conditions of imitating real applications. In order to better understand the long-term behavior, the duration of reliability test is extended from typical 1000h to 6 – 12 months of operation. The results show that under these actual operating conditions, SiC MOSFET does not show signs of hot carrier injection, nor does it show the EOL failure mechanism of the system. Editor in charge: XJ Original title: SiC MOSFET product quality certification and life evaluation method The source of the article: official account of WeChat: Infineon semiconductor, welcome to add attention! Please indicate the source when reprinting the article., Read the full text, original title: SiC MOSFET product quality certification and life evaluation method The source: micro signal: yflgybdt, WeChat official account: Infineon semiconductor, welcome to add attention! Please indicate the source of the article“

     

     

     

     

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