"In a large number of low-power applications such as USB adapters, mobile phone chargers, and system bias power supplies, low-cost resonance / non-continuous mode flyback converter is common selection (Figure 1). Such converter design is high, The cost is extremely low. So why not consider using a bipolar node transistor (BJT) in its own design?
In this way, there are two very convincing reasons: one is the cost of BJT is much lower than fet; the other is the voltage level of BJT is much higher than fet. This helps designers reduce the electrical stress and power consumption of clamp circuits and / or buffer circuits. The only problem with BJT is that many engineers have become accustomed to FET or never used BJT as the main switch (QA) in their power converter. This article will explore how to estimate / calculate the loss of NPN BJT used in a non-continuous / quasi-resonant mode inversion converter.
Figure 1: Offline high voltage BJT adapter flyback circuit
Before exploring the method of calculating BJT loss, it is necessary to make a basic understanding of the bipolar transistor model. The simplest form of a bipolar transistor is a current control type current / switch. The base (B) input can control the current flowing from the collector (C) to the emitter (E). Figure 2 is a concept and schematic diagram of the NPN BJT. The device is doped with two N (negative charge atom) semiconductor regions separated by P (positively atom) dopant. The base is connected to the P material, and the emitter and the collector are respectively connected to two N regions of the transistor, respectively.
Figure 2: BJT semiconductor (a) and schematic symbol (B)
The function of the base emitter is similar to the diode. A positive voltage is applied to the base emission electrode, and the free electron is attracted to the N material (connected to the emitter (e)). These free electron migrate to the p material, resulting in the lack of free electrons of N materials. Free electrons in N materials will attract electrons from the negative end of the bias power source (connected to the base and emitter) to form a complete circuit to allow current. The negative bias of the B node and E nodes can cause excess electrons from being attracted from the P material. This will disconnect the circuit, prevent current flow, just like the diode is reverse biased.
When the base emitter is biased, the collector is off to the emitter path, which can turn on the flood gate, allow current flow. The forward bias connecting to the collector will attract the free electron flow to the collector terminal, forming electrons in the n material. This can attract electrons from the base, depleting it in the N material. The current can now flow through the exhaustion layer of the collector and the emitter, forming a complete circuit. The quantity of the collector current (IC) may be more than the base current (Ib). The ratio between the IC and IB is generally referred to as the DC current gain of the transistor. It can also be expressed as beta (β) or HFE in the product specification. Note that in the transistor product specification, this ratio is given under certain conditions, there may be significant changes.
(Equation 1)
Work in saturation
When the collector base current is forced to be lower than the HFE value specified by the product specification, the transistor can be defined as saturation. When the BJT is in a saturated state, increasing the base current does not generate more collector currents. The voltage between the collector emitters has fallen to the lowest level. This is referred to in the product specification as a collector emitter saturation voltage (VCE (SAT)). This voltage is typically 0.5V to 2V, depending on BJT. In the adapter and bias power supply application, the device can be driven in a saturated state when the BJT is used as the main switch to maintain the minimum conduction loss.
Saturated BJT in flyback design
(Equation 2)
Field Effect Transistor (FET) is a hot selection of an intermediate power consumption range (30W to 1 kW) because the conductive loss of FET is generally less than the BJT conduction loss. However, in low power applications such as 15W to 30W of the bias power supply and adapter, the switch current is smaller. Therefore, BJT can be used to exhibit a lower cost and higher voltage rating. But this type of device is not perfect, and it is necessary to deal with some shortcomings during the design.
When using FET, the gate is only conductive current when the gate capacitance is charged and discharge. When the base emitting pole is in a forward bias, BJT has been conducted. Further, when the saturated BJT is turned off, a considerable part of the collector current flows out of the transistor base due to storage charge causes. This is different from FET, and the gate driver of the FET never has a drain current of the FET. This will bring more stress to the base driver of the flyback controller. When selecting a reverse controller for such design, it should be ensured that it controls and drives BJT in the adapter application. The UCC28722 anti-exchanging controller is specially designed to control the quasi-resonance / discontinuous reverse transducer to use BJT as the main switch. The driver circuit of the flyback controller is detailed in Figure 3.
Figure 3: Controller base driver internal circuit
To calculate the power consumption of BJT in this low-power anti-excitement application, you need to basically understand the waveform of BJT (Figure 4). Note that the BJT collector voltage (Vc), the collector current (IC), and the current sensor resistor voltage (VRCS) can be truncated 5W USB adapter. The base current (Ib) and the output diode current (IDC) simply draw the corresponding current, may not be an actual level.
Figure 4: Switch waveform of BJT in the quasi-resonant reverse transformer
At the starting point of the T1 time period, the collector current is 0. The base uses a minimum drive current of 19 mA (IdRV (Min)), which can be gradually incremented to the maximum drive current (IDRV (max)) of 37 mA. Since the collector current starts from 0, the maximum drive current is provided to the base of the switching cycle is not necessarily necessary and inefficient. The switch remains turned on until the maximum drive current can be determined by the controller control. The primary current is induced by the current sensor resistor (RCS). In the T1 time period, the transformer (T1 is energized, BJT is driven to saturation. Once the T1 endpoints reaches the desired current, the base of the BJT can be lowered by FET. At this time, all the collector currents will flow out. The transistor base is injected into the DRV controller pin (IdRV).
Reverse recovery and depletion of base current
In the T2 time period, the base collective electrode junction enters the reverse recovery, the transistor remains turned on until the base current consumes half of the current collector current. Note that the difference between the time segment collector current and the emitter current is a current flowing through the transistor base. The transistor remains turned on, and the magnitude of the collector current is maintained constant. This time period is also called BJT storage time (TS), which can be found on the device's product manual.
The storage time ends, when T3 begins, the transistor begins to turn off. During this time period, two nodes of transistor PN entered reverse recovery. When the transistor is turned off, the collector current will be exhausted, the base and the emitter share the current electrode current. The collector voltage gradually increased until the device is completely turned off. When the BJT is completely turned off, the collector voltage reaches the maximum value. This voltage is the sum of the peak voltage caused by the input voltage, the transformer reflected output voltage, and the transformer leakage inductance.
Within the T4 time period, energy is not only supplied to the secondary winding, but also the diode DG starts to be conducted, so that energy can be supplied to the output. When the energy of the transformer is exhausted, the collector voltage begins to be grounded. This voltage can be sensing through the number of turns (NA / NP) of the auxiliary windings. When the controller is observed that the transformer is out of charge, the T5 delay can be increased to implement the valley switch. Note that the waveform in Figure 4 is only a screenshot, and the converter is working in the near future transmission state. The controller can also adjust the frequency and amplitude of the primary current, but also drive the converter to enter the non-continuous mode, thereby controlling the duty cycle. The maximum duty cycle of these converters occurs when the converter operates in the near future of the design set.
The calculation method of the transmission and switching loss in BJT is similar to the diode. The base, the emitter and the collector saturation voltage can be modeled according to the battery, similar to the positive voltage of the diode. The average current can be used to estimate average conductive losses. In this application, all currents involved in the calculation are triangular or trapezoidal. The average calculation not only uses the basic geometric principle, but also clear records. The main difference is that BJT has a charge storage delay (TS). The base of the BJT transistor needs to remove a certain amount of storage charge (QS) prior to the device starts to turn off. This needs to know how to calculate the reverse recovery charge (QR) of the PN node. Reverse recovery charges refer to the number of reverse charges required to stop the semiconductor device stop.
In order to calculate the loss of BJT switch (QA), let's see 5W USB flyback converters using NPN transistors (under 115V RMS input). Detailed specification is shown in Table 1. The peak collector current (IC (PK) is limited to 360mA by the controller, and the maximum frequency of the converter is limited to 70kHz. In the full load of 115VRMS input, the average switching frequency (FAVG) of the converter is 56kHz According to the minimum input voltage, the maximum duty cycle (DMAX) adopted by the converter is 52%. Under the input condition, the highest collector voltage (Vc (max)) is 250V.
(Equation 3)
Transistor loss estimation
The transistor loss is estimated, and it is necessary to estimate the various periods of time shown in FIG. The T1 time period is the long-lasting duty cycle, which is about 7.4 us for this design example.
(Equation 4)
The estimation T2 time period requires computing the storage charge (QS) of the device.
According to the TS parameters of the product manual and the base discharge current (I, the storage charge is 200nc:
(Equation 5)
At T1 time, the transistor is driven to saturate. In the T1 time period, all collective electrode currents flow through the transistor base. Since the base enters some type of reverse recovery in T2, the collector current is discharged between the base and the emitter of the transistor. According to this information, the current is the characteristic of the trapezoid in this period, the average base current of the T2 storage time period (IB (AVGT2)) can be calculated as follows:
(Equation 6)
With the average base current and QS, the T2 time period can be calculated by the following equation:
(Equation 7)
(Equation 8)
The quantity of the collector reverse recovery charge (QR) can be used to estimate the switching time period T3. According to the BJT product manual, the calculation result of the parameter QR is 36nc.
(Equation 9)
Press triangular characteristics, the average collector current (IC (AVGT3)) of T3 time period is 180 mA. The collector current and the calculated QR can be used to estimate the length of the T3 time period, approximately 200ns in this design example.
(Equation 10)
(Equation 11)
According to the time estimation of the T1 to T3 time period, equation 12 can calculate the loss (PQA) of the BJT input under 115V RMS using equation 12. In this equation, the first component is the base to the emitter transmission loss when the BJT is biased. The second group is an estimation of the BJT loss caused by the collector current in the T1 and T2 time periods. This includes current flowing through the base. The base of the base to the collective voltage is estimated by VCE (SAT). The third group is used to estimate the shutdown loss of BJT.
(Equation 12)
Converter circuit
USB adapter circuit "
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